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To: Ahmad Fatoum <a.fatoum@pengutronix.de>,
Sascha Hauer <s.hauer@pengutronix.de>, BAREBOX <barebox@lists.infradead.org>
References: <20250311-pca9450-wdog-v1-0-45120abeae00@pengutronix.de>
<20250311-pca9450-wdog-v1-2-45120abeae00@pengutronix.de>
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From: Jonas Rebmann <jre@pengutronix.de>
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Subject: Re: [PATCH 2/2] ARM: boards: remove obsolete PCA9450_RESET_CTRL setup
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Hi Ahmad,
Not so much. As mentioned in the cover, the imx8 boards routinely
configure a larger array of pca9450 registers. As I didn't give the rest
of that setup a closer look, I did not change the code.
I have only tested this series on the phyboard segin imx93.
Just like with the imx93 boards, after application of the driver patch,
the { PCA9450_RESET_CTRL, 0xA1 } lines in lowlevel.c should no more have
an effect (as no board currently uses nxp,wdog_b-warm-reset).
Should I remove all { PCA9450_RESET_CTRL, 0xA1 } configuration in v2?
- Jonas
On 2025-03-11 12:03, Ahmad Fatoum wrote:
> Hi,
>
> On 3/11/25 11:50, Jonas Rebmann wrote:
>> Since a previous commit, PCA9450_RESET_CTRL is initialized to 0xA1 in
>> pca9450_probe; explicitly setting this in board.c has no effect anymore.
>
> Note that there is a number of i.MX8M boards that also use the PCA9450
> and configure 0xA1 into PCA9450_RESET_CTRL in their lowlevel.c.
>
> Any particular reason against or for dropping the configuration there?
>
> Thanks,
> Ahmad
>
>> Signed-off-by: Jonas Rebmann <jre@pengutronix.de>
>> ---
>> arch/arm/boards/phytec-phycore-imx93/board.c | 9 ---------
>> arch/arm/boards/tqma93xx/board.c | 3 ---
>> 2 files changed, 12 deletions(-)
>>
>> diff --git a/arch/arm/boards/phytec-phycore-imx93/board.c b/arch/arm/boards/phytec-phycore-imx93/board.c
>> index 149248ca654624826d0e8f6fe0f1f42c2747e248..03ba8cb5026d2a9eaa054fcfc69e18872fcd658e 100644
>> --- a/arch/arm/boards/phytec-phycore-imx93/board.c
>> +++ b/arch/arm/boards/phytec-phycore-imx93/board.c
>> @@ -6,23 +6,14 @@
>> #include <init.h>
>> #include <linux/kernel.h>
>> #include <environment.h>
>> -#include <mfd/pca9450.h>
>> #include <deep-probe.h>
>> #include <mach/imx/bbu.h>
>> #include <linux/pinctrl/consumer.h>
>>
>> -static void phycore_imx93_init_pmic(struct regmap *map)
>> -{
>> - /* set WDOG_B_CFG to cold reset */
>> - regmap_write(map, PCA9450_RESET_CTRL, 0xA1);
>> -}
>> -
>> static int phycore_imx93_probe(struct device *dev)
>> {
>> struct device_node *np;
>>
>> - pca9450_register_init_callback(phycore_imx93_init_pmic);
>> -
>> /*
>> * The phy on the EQOS has its MDIO lines connected to the FEC. The phy
>> * registers can only be successfully read when the EQOS pinctrl setup
>> diff --git a/arch/arm/boards/tqma93xx/board.c b/arch/arm/boards/tqma93xx/board.c
>> index b181784079cf12e5a112d13f95c87c2cf5ebeba6..b4de6c2f6c347cb255537a3784a667a9c2607de3 100644
>> --- a/arch/arm/boards/tqma93xx/board.c
>> +++ b/arch/arm/boards/tqma93xx/board.c
>> @@ -27,9 +27,6 @@ static void tqma93xx_init_pmic(struct regmap *map)
>>
>> /* I2C_LT_EN*/
>> regmap_write(map, 0xa, 0x3);
>> -
>> - /* set WDOG_B_CFG to cold reset */
>> - regmap_write(map, PCA9450_RESET_CTRL, 0xA1);
>> }
>>
>> static int tqma93xx_probe(struct device *dev)
>>
>
>
>