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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	BAREBOX <barebox@lists.infradead.org>
Cc: "Claude Opus 4.7" <noreply@anthropic.com>
Subject: Re: [PATCH 01/10] mci: sdhci: define VDD_180 and shrink UHS_MASK to bits 0..2
Date: Mon, 18 May 2026 10:58:58 +0200	[thread overview]
Message-ID: <33a15b15-bf59-4bf9-894b-eb4b08cde081@pengutronix.de> (raw)
In-Reply-To: <20260511-rockchip-emmc-hs400-v1-1-515fb6d20e12@pengutronix.de>



On 5/11/26 2:07 PM, Sascha Hauer wrote:
> Per SDHCI 3.0+, HOST_CONTROL2's UHS Mode Select is bits 0..2 (3 bits)
> and bit 3 is the 1.8 V Signaling Enable. The current SDHCI_CTRL_UHS_MASK
> of GENMASK(3, 0) is one bit too wide and clears 1.8 V signaling every
> time sdhci_set_uhs_signaling() runs.
> 
> Shrink the mask to GENMASK(2, 0) and add SDHCI_CTRL_VDD_180 = BIT(3) so
> controllers that need to drive 1.8 V on I/O for HS200/HS400/UHS modes
> can OR the bit in without it being clobbered on the next set_clock().
> 
> No functional change for controllers where VDD_180 was unused (most
> in-tree drivers do not touch it; voltage switching there is either
> fixed by board wiring or handled by an external regulator).
> 
> Assisted-by: Claude Opus 4.7 <noreply@anthropic.com>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
>  drivers/mci/imx-esdhc-common.c | 2 --
>  drivers/mci/sdhci.h            | 3 ++-
>  2 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mci/imx-esdhc-common.c b/drivers/mci/imx-esdhc-common.c
> index 050621d7fb..eb6a71915f 100644
> --- a/drivers/mci/imx-esdhc-common.c
> +++ b/drivers/mci/imx-esdhc-common.c
> @@ -12,8 +12,6 @@
>  
>  #define	ESDHC_CTRL_D3CD			0x08
>  
> -#define  SDHCI_CTRL_VDD_180         0x0008
> -
>  #define ESDHC_MIX_CTRL			0x48
>  #define  ESDHC_MIX_CTRL_DDREN		(1 << 3)
>  #define  ESDHC_MIX_CTRL_AC23EN		(1 << 7)
> diff --git a/drivers/mci/sdhci.h b/drivers/mci/sdhci.h
> index 8d21febd7a..a04eb5b7ed 100644
> --- a/drivers/mci/sdhci.h
> +++ b/drivers/mci/sdhci.h
> @@ -132,13 +132,14 @@
>  #define SDHCI_SIGNAL_ENABLE					0x38
>  #define SDHCI_ACMD12_ERR__HOST_CONTROL2				0x3C
>  #define SDHCI_HOST_CONTROL2					0x3E
> -#define  SDHCI_CTRL_UHS_MASK			GENMASK(3, 0)
> +#define  SDHCI_CTRL_UHS_MASK			GENMASK(2, 0)
>  #define   SDHCI_CTRL_UHS_SDR12			0x0
>  #define   SDHCI_CTRL_UHS_SDR25			0x1
>  #define   SDHCI_CTRL_UHS_SDR50			0x2
>  #define   SDHCI_CTRL_UHS_SDR104			0x3
>  #define   SDHCI_CTRL_UHS_DDR50			0x4
>  #define   SDHCI_CTRL_HS400			0x5 /* Non-standard */
> +#define  SDHCI_CTRL_VDD_180			BIT(3)
>  #define  SDHCI_CTRL_DRV_TYPE_MASK		GENMASK(5, 4)
>  #define   SDHCI_CTRL_DRV_TYPE_B			0x0000
>  #define   SDHCI_CTRL_DRV_TYPE_A			0x0010
> 

-- 
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  reply	other threads:[~2026-05-18  8:59 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-11 12:07 [PATCH 00/10] mci: rockchip-dwcmshc: add HS400(ES) support Sascha Hauer
2026-05-11 12:07 ` [PATCH 01/10] mci: sdhci: define VDD_180 and shrink UHS_MASK to bits 0..2 Sascha Hauer
2026-05-18  8:58   ` Ahmad Fatoum [this message]
2026-05-11 12:07 ` [PATCH 02/10] mci: mmc_send_tuning: actually point data.dest at the buffer Sascha Hauer
2026-05-11 12:49   ` Ahmad Fatoum
2026-05-11 12:07 ` [PATCH 03/10] mci: sdhci: add ADMA2 descriptor helpers Sascha Hauer
2026-05-18  9:18   ` Ahmad Fatoum
2026-05-18 12:16     ` Sascha Hauer
2026-05-18 12:20       ` Ahmad Fatoum
2026-05-11 12:07 ` [PATCH 04/10] mci: add HS400 mode selection Sascha Hauer
2026-05-18  9:36   ` Ahmad Fatoum
2026-05-18 12:35     ` Sascha Hauer
2026-05-11 12:08 ` [PATCH 05/10] mci: add HS400 Enhanced Strobe (HS400ES) selection Sascha Hauer
2026-05-18  9:54   ` Ahmad Fatoum
2026-05-18 13:06     ` Sascha Hauer
2026-05-11 12:08 ` [PATCH 06/10] mci: rockchip-dwcmshc-sdhci: use ADMA2 Sascha Hauer
2026-05-11 12:55   ` Ahmad Fatoum
2026-05-11 14:01     ` Sascha Hauer
2026-05-11 14:06       ` Ahmad Fatoum
2026-05-11 12:08 ` [PATCH 07/10] mci: sdhci: rockchip: set TX-path source-select bit in DWCMSHC_EMMC_DLL_TXCLK Sascha Hauer
2026-05-18  9:57   ` Ahmad Fatoum
2026-05-11 12:08 ` [PATCH 08/10] mci: sdhci: rockchip: distinguish IP revision 0 (rk3568) from 1 (rk3576/rk3588) Sascha Hauer
2026-05-18  9:59   ` Ahmad Fatoum
2026-05-11 12:08 ` [PATCH 09/10] mci: sdhci: rockchip: support HS400 Sascha Hauer
2026-05-18 10:09   ` Ahmad Fatoum
2026-05-11 12:08 ` [PATCH 10/10] mci: sdhci: rockchip: support HS400 Enhanced Strobe Sascha Hauer
2026-05-18 10:10   ` Ahmad Fatoum

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