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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>, johannes@gnu-linux.rocks
Cc: barebox@lists.infradead.org
Subject: Re: Porting Cora Z7 Board to barebox
Date: Tue, 29 Apr 2025 11:49:40 +0200	[thread overview]
Message-ID: <3761c82f-78ec-42ea-bf4a-d8ecbdced01d@pengutronix.de> (raw)
In-Reply-To: <aBCO-SSyT0BQnlek@pengutronix.de>

Hi,

On 4/29/25 10:34, Sascha Hauer wrote:
> In case of the Zedboard you could take start_avnet_zedboard.pbl. This
> contains all necessary components including device tree and barebox
> proper.
> 
> However, this binary is linked to 0x0 and the FSBL will likely load it
> there. I don't know where the FSBL itself is located.

The pbl files tend to be a bit bigger, because they are meant only
as input to objcopy. You can add to images/Makefile.zynq, e.g.

  image-$(CONFIG_MACH_ZEDBOARD) += start_avnet_zedboard.elf

And it will generate a much more compact ELF file that should
be interchangeable (I had tested this on ZynqMP).

>> Is there a way to hard code the UART to use for the barebox
>> console for barebox proper?
> 
> Why do you want to hardcode it? Setting the console via device tree is
> just fine.
> 
> For debugging your early code I recommend CONFIG_DEBUG_LL. For zynq the
> UART is hardcoded to ZYNQ_UART1_BASE_ADDR in include/mach/zynq/debug_ll.h.
> You can change it in this file.
> 
> With CONFIG_DEBUG_LL enabled you can put putc_ll() in your code.

CONFIG_DEBUG_PBL is also often useful.

>> The Zynq on the Cora Z7 only embeds a single core Cortex A9 while the SoC on the
>> Zedboard embeds a dual core Cortex A9. Does this affect the cores initialization
>> in arch/arm/mach_zynq?
> 
> I don't think so. I haven't used Zynq myself though.

Cheers,
Ahmad

> 
> Regards,
>   Sascha
> 

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      reply	other threads:[~2025-04-29  9:51 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-28 17:20 johannes
2025-04-29  8:34 ` Sascha Hauer
2025-04-29  9:49   ` Ahmad Fatoum [this message]

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