From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Fri, 12 May 2023 19:24:42 +0200 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1pxWVX-00FKjS-EM for lore@lore.pengutronix.de; Fri, 12 May 2023 19:24:42 +0200 Received: from bombadil.infradead.org ([2607:7c80:54:3::133]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pxWVV-00032I-Et for lore@pengutronix.de; Fri, 12 May 2023 19:24:41 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Cc:Content-ID:Content-Description:Resent-Date:Resent-From :Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Content-Language: en-US To: Sascha Hauer , Barebox List References: <20230512111008.1120833-1-s.hauer@pengutronix.de> <20230512111008.1120833-7-s.hauer@pengutronix.de> From: Ahmad Fatoum In-Reply-To: <20230512111008.1120833-7-s.hauer@pengutronix.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230512_102339_216174_0507A31B X-CRM114-Status: GOOD ( 17.24 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.7 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH 06/27] ARM: mmu32: rename mmu.h to mmu_32.h X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) On 12.05.23 13:09, Sascha Hauer wrote: > mmu.h is 32bit specific, so rename it to mmu32.h like the C files Nitpick: mmu_32.h > have been renamed already. > > Signed-off-by: Sascha Hauer Reviewed-by: Ahmad Fatoum > --- > arch/arm/cpu/cache_32.c | 2 +- > arch/arm/cpu/mmu-early_32.c | 2 +- > arch/arm/cpu/mmu_32.c | 2 +- > arch/arm/cpu/{mmu.h => mmu_32.h} | 0 > arch/arm/cpu/sm.c | 3 +-- > 5 files changed, 4 insertions(+), 5 deletions(-) > rename arch/arm/cpu/{mmu.h => mmu_32.h} (100%) > > diff --git a/arch/arm/cpu/cache_32.c b/arch/arm/cpu/cache_32.c > index 4202406d0d..0ac50c4d9a 100644 > --- a/arch/arm/cpu/cache_32.c > +++ b/arch/arm/cpu/cache_32.c > @@ -6,7 +6,7 @@ > #include > #include > > -#include "mmu.h" > +#include "mmu_32.h" > > struct cache_fns { > void (*dma_clean_range)(unsigned long start, unsigned long end); > diff --git a/arch/arm/cpu/mmu-early_32.c b/arch/arm/cpu/mmu-early_32.c > index 4895911cdb..07c5917e6a 100644 > --- a/arch/arm/cpu/mmu-early_32.c > +++ b/arch/arm/cpu/mmu-early_32.c > @@ -9,7 +9,7 @@ > #include > #include > > -#include "mmu.h" > +#include "mmu_32.h" > > static uint32_t *ttb; > > diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c > index 78dd05577a..8ec21ee1d2 100644 > --- a/arch/arm/cpu/mmu_32.c > +++ b/arch/arm/cpu/mmu_32.c > @@ -18,7 +18,7 @@ > #include > #include > > -#include "mmu.h" > +#include "mmu_32.h" > > #define PTRS_PER_PTE (PGDIR_SIZE / PAGE_SIZE) > #define ARCH_MAP_WRITECOMBINE ((unsigned)-1) > diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu_32.h > similarity index 100% > rename from arch/arm/cpu/mmu.h > rename to arch/arm/cpu/mmu_32.h > diff --git a/arch/arm/cpu/sm.c b/arch/arm/cpu/sm.c > index f5a1edbd4f..53f5142b63 100644 > --- a/arch/arm/cpu/sm.c > +++ b/arch/arm/cpu/sm.c > @@ -19,8 +19,7 @@ > #include > #include > #include > - > -#include "mmu.h" > +#include "mmu_32.h" > > static unsigned int read_id_pfr1(void) > { -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |