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Content preview: On 2026-10-01 12:42, Florijan Plohl wrote: > From: Stefan Riedmueller > > The i.MX 6 requires a ref clock from the PHY when running in RGMII mode. > Since the clock output fr [...] Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 DMARC_MISSING Missing DMARC policy X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: barebox@lists.infradead.org, upstream@lists.phytec.de Sender: "barebox" X-Spamd-Result: default: False [-54.41 / 15.00]; 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FORGED_RECIPIENTS_MAILLIST(0.00)[]; ARC_SIGNED(0.00)[pengutronix.de:s=20260414:i=2]; NEURAL_HAM(-0.00)[-1.000]; MID_RHS_MATCH_FROM(0.00)[]; FORGED_SENDER_FORWARDING(0.00)[]; FROM_HAS_DN(0.00)[]; FROM_NEQ_ENVFROM(0.00)[s.hauer@pengutronix.de,barebox-bounces@lists.infradead.org]; R_DKIM_REJECT(0.00)[pengutronix.de:s=20260414]; FORGED_RECIPIENTS_FORWARDING(0.00)[]; ASN(0.00)[asn:7247, ipnet:2607:7c80:54::/48, country:US]; DKIM_TRACE(0.00)[lists.infradead.org:+,pengutronix.de:-]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; MISSING_XM_UA(0.00)[]; FORGED_SENDER_MAILLIST(0.00)[] X-Rspamd-Action: no action X-Rspamd-Server: mx1 X-Rspamd-Queue-Id: 9CF3C201EAF X-Stat-Signature: pqjybjewebz3tnmsze1945ki5iiyx9og On 2026-10-01 12:42, Florijan Plohl wrote: > From: Stefan Riedmueller >=20 > The i.MX 6 requires a ref clock from the PHY when running in RGMII mode. > Since the clock output from the GP_CLK pin is disabled by default on the > ADIN1300 PHY we need a fixup to enable it. >=20 > Signed-off-by: Stefan Riedmueller > Signed-off-by: Florijan Plohl > --- > arch/arm/boards/phytec-som-imx6/board.c | 39 +++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) >=20 > diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/ph= ytec-som-imx6/board.c > index 7e6f61bc36..22805ad99e 100644 > --- a/arch/arm/boards/phytec-som-imx6/board.c > +++ b/arch/arm/boards/phytec-som-imx6/board.c > @@ -45,6 +45,9 @@ > #define DA9062_BUCK4_CFG 0x9f > #define DA9062_BUCKx_MODE_SYNCHRONOUS (2 << 6) > =20 > +#define PHY_ID_ADIN1300 0x0283bc30 > +#define ADIN_PHY_ID_MASK 0x0fffffff > + > static void phyflex_err006282_workaround(void) > { > /* > @@ -99,6 +102,33 @@ static int ksz8081_phy_fixup(struct phy_device *phyde= v) > return 0; > } > =20 > +static int adin1300_phy_fixup(struct phy_device *phydev) > +{ > + u16 val; > + /* > + * Enable 125 MHz PHY clock at GP_CLK pin to the ENET_REF_CLK pin > + * of the i.MX 6 > + */ > + > + phy_write(phydev, 0x1c, 0x2109); > + phy_write(phydev, 0x1b, 0x401); > + phy_write(phydev, 0x10, 0xff1f); > + phy_write(phydev, 0x11, 0x28); > + phy_write(phydev, 0x10, 0xff3c); > + phy_write(phydev, 0x11, 0x1); > + > + /* > + * Disable advertisement of 100BASE-TX and 1000BASE-T EEE capabilities > + * by clearing EEE_100_ADV and EEE_1000_ADV bits in EEE_ADV (0x8001) re= g. > + */ > + phy_write(phydev, 0x10, 0x8001); > + val =3D phy_read(phydev, 0x11); > + val &=3D ~(BIT(1) | BIT(2)); > + phy_write(phydev, 0x11, 0x0); > + > + return 0; > +} > + > static int phycore_da9062_setup_buck_mode(void) > { > struct i2c_adapter *adapter =3D NULL; > @@ -180,6 +210,9 @@ static int physom_imx6_probe(struct device *dev) > default_environment_path =3D "/chosen/environment-spinor"; > default_envdev =3D "SPI NOR flash"; > =20 > + phy_register_fixup_for_uid(PHY_ID_ADIN1300, ADIN_PHY_ID_MASK, > + adin1300_phy_fixup); > + > imx6_bbu_internal_mmc_register_handler("mmc2", > "/dev/mmc2", 0); > =20 > @@ -188,6 +221,9 @@ static int physom_imx6_probe(struct device *dev) > default_environment_path =3D "/chosen/environment-nand"; > default_envdev =3D "NAND flash"; > =20 > + phy_register_fixup_for_uid(PHY_ID_ADIN1300, ADIN_PHY_ID_MASK, > + adin1300_phy_fixup); > + > imx6_bbu_internal_mmc_register_handler("mmc2", > "/dev/mmc2", 0); > } else if (flags & IS_PHYCORE) { > @@ -198,6 +234,9 @@ static int physom_imx6_probe(struct device *dev) > default_environment_path =3D "/chosen/environment-spinor"; > default_envdev =3D "SPI NOR flash"; > =20 > + phy_register_fixup_for_uid(PHY_ID_ADIN1300, ADIN_PHY_ID_MASK, > + adin1300_phy_fixup); > + I think you can move this out of the board specific if/else path and do it once instead of repeating this. The phy_id/mask make sure it is only executed on the ADIN1300 phy and not on the one board which has another phy. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |