On 04/19/2013 09:52 AM, Juergen Beisert wrote: > Marc Kleine-Budde wrote: >> Since commit: >> >> 2ccd451 ARM i.MX28: change default watchdog reset method >> >> the external reset via the reset pin is broken. That commit overwrites the >> HW_CLKCTRL_RESET register with only WDOG_POR_DISABLE set, which results in >> disabling the external reset. >> >> This patch sets the EXTERNAL_RESET_ENABLE bit, too. While there clean up >> the name of the WDOG_POR_DISABLE define. >> >> Cc: Steffen Trumtrar >> Signed-off-by: Marc Kleine-Budde >> --- >> arch/arm/mach-mxs/soc-imx28.c | 9 ++++++--- >> 1 file changed, 6 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm/mach-mxs/soc-imx28.c b/arch/arm/mach-mxs/soc-imx28.c >> index 8972a3d..bcf4bcc 100644 >> --- a/arch/arm/mach-mxs/soc-imx28.c >> +++ b/arch/arm/mach-mxs/soc-imx28.c >> @@ -20,8 +20,9 @@ >> #include >> >> #define HW_CLKCTRL_RESET 0x1e0 >> -# define HW_CLKCTRL_RESET_CHIP (1 << 1) >> -#define HW_CLKCTRL_WDOG_POR_DISABLE (1 << 5) >> +#define HW_CLKCTRL_RESET_CHIP (1 << 1) >> +#define HW_CLKCTRL_RESET_EXTERNAL_RESET_ENABLE (1 << 4) >> +#define HW_CLKCTRL_RESET_WDOG_POR_DISABLE (1 << 5) >> >> /* Reset the full i.MX28 SoC via a chipset feature */ >> void __noreturn reset_cpu(unsigned long addr) >> @@ -44,7 +45,9 @@ static int imx28_init(void) >> * powered via battery, then a WDT reset powers the chip down instead >> * of resetting it. Use a software reset only. >> */ >> - writel(HW_CLKCTRL_WDOG_POR_DISABLE, IMX_CCM_BASE + HW_CLKCTRL_RESET); >> + writel(HW_CLKCTRL_RESET_WDOG_POR_DISABLE | >> + HW_CLKCTRL_RESET_EXTERNAL_RESET_ENABLE, >> + IMX_CCM_BASE + HW_CLKCTRL_RESET); > > IMHO forcing the HW_CLKCTRL_RESET_EXTERNAL_RESET_ENABLE bit set is even as bad > as reset it with the previous patch. We should left this bit untouched > instead. will change Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |