From: Bo Shen <voice.shen@atmel.com>
To: Matteo Fortini <matteo.fortini@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] SAMA5D3X FIX AT91_SMC_CS offset stride
Date: Thu, 29 May 2014 09:31:19 +0800 [thread overview]
Message-ID: <53868DE7.9030207@atmel.com> (raw)
In-Reply-To: <CAC_9p+84LdjnZ=7zRtHYchpCDigYWKhy5H7Ed+gr0SnvPUDH+g@mail.gmail.com>
Hi Matteo,
Thanks for your patch. Can you resend it directly while not through
attachment?
When you resend, you can add my acked-by.
Best Regards,
Bo Shen
On 05/29/2014 01:16 AM, Matteo Fortini wrote:
> As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move
> from CS(n) to CS(n+1) the stride is 0x14 and not 0x10.
>
> For this reason, I was unable to use the NAND memory on my board (CS
> configuration was not applied and the timings were wrong).
>
> This patch fixes the problem.
>
> Matteo
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next prev parent reply other threads:[~2014-05-29 1:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-28 17:16 Matteo Fortini
2014-05-29 1:31 ` Bo Shen [this message]
2014-05-29 9:55 [PATCH] sama5d3x: fix " Matteo Fortini
2014-05-29 12:11 ` Jean-Christophe PLAGNIOL-VILLARD
2014-05-30 1:43 ` Bo Shen
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