Re: Reset on Beaglebone Black has become unreliable/broken

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Hello Konstantin,

On 03.12.24 19:34, Konstantin Kletschke wrote:
> 
> Today tried the following for debugging purposes:
> 
> In am33xx_generic.c in arch/arm/mach-omap there is in
> am33xx_restart_soc() this:
> 
> writel(AM33XX_PRM_RSTCTRL_RESET, AM33XX_PRM_RSTCTRL);
> 
> which is 0x1 written to 0x44e00f00 and causes warm restart.
> 
> I can simulate this with "mw 0x44e00f00 0x1" which shows the freeze 
> I see (upon restart) on affected BBBs.

This happens without Linux first starting, right? So that invalidates
my theory of Linux reconfiguring the PMIC to something invalid.

> 
> When I change the value to 0x2 (cold restart) the affected BBBs restart
> successfully!

Nice. Do you know about https://barebox.org/doc/latest/user/system-reset.html ?

TL;DR: Cold reset is usually the preferred way to reset as it comes
with the least amount of surprises.

> Does this ring a bell for people more experiened? This is not meant as a
> proposed solution (Watchdog restart, Linux Kernel restart no covered,
> reset cause deleted/hidden(?)), more is it meant as an idea to find the
> cause. Poweron, cold restart working always100%, warm restart never.

What does a cold reset do on an electrical level? Does it tell the PMIC
to do a reset?

Anther thing, I wonder about is what configuration the PMIC has on affected
boards and boards not affected. Can you use the I2C commands in barebox
to read the PMIC register set and compare it between the affected and
unaffected boards? Maybe they have different mask defaults?

Cheers,
Ahmad

> 
> Regards
> Konstantin
> 


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