Re: [PATCH 1/3] arch/arm/boards/avnet-zedboard/zedboard.zynqcfg: removed everything but stop instruction to fix barebox boot

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Hi,

On 07.07.25 07:53, Gwenhael Goavec-Merou wrote:
> From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
> 
> As mentionned in [1,2] sequence present in arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
> causes boot failure without any messages.
> 
> This patch removes all instructions but the last one allowing to have
> access to the barebox prompt
> 
> [1] https://lore.barebox.org/barebox/VI1PR02MB4429606E3B06D0F53D2B4175AB4DA@VI1PR02MB4429.eurprd02.prod.outlook.com/T/#m5fa4fe7832215a7e8160ef6fbd3d122dd58b0a92
> [2] https://lore.barebox.org/barebox/VI1PR02MB4429606E3B06D0F53D2B4175AB4DA@VI1PR02MB4429.eurprd02.prod.outlook.com/T/#m5fa4fe7832215a7e8160ef6fbd3d122dd58b0a92

The title is a bit long, but I think Sascha can fix it up on apply.
I'd rather suggest:

  ARM: zynq: zed: remove early clock config causing hang

Lucas, do you have any input why this configuration may cause issues?

Anyhow:

Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

Thanks,
Ahmad

> 
> Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
> ---
>  .../boards/avnet-zedboard/zedboard.zynqcfg    | 20 -------------------
>  1 file changed, 20 deletions(-)
> 
> diff --git a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
> index c6a96aec7b..8e68bbf618 100644
> --- a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
> +++ b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg
> @@ -1,24 +1,4 @@
>  #include <zynq/zynq7000-header-regs.h>
>  
> -wm 32 ZYNQ_SLCR_UNLOCK		0x0000DF0D
> -wm 32 ZYNQ_CLK_621_TRUE		0x00000001
> -wm 32 ZYNQ_APER_CLK_CTRL	0x01FC044D
> -
> -wm 32 ZYNQ_ARM_PLL_CTRL		0x00028008
> -wm 32 ZYNQ_ARM_PLL_CFG		0x000FA220
> -wm 32 ZYNQ_ARM_PLL_CTRL		0x00028010
> -wm 32 ZYNQ_ARM_PLL_CTRL		0x00028011
> -wm 32 ZYNQ_ARM_PLL_CTRL		0x00028010
> -wm 32 ZYNQ_ARM_PLL_CTRL		0x00028000
> -
> -wm 32 ZYNQ_IO_PLL_CTRL		0x0001E008
> -wm 32 ZYNQ_IO_PLL_CFG		0x001452C0
> -wm 32 ZYNQ_IO_PLL_CTRL		0x0001E010
> -wm 32 ZYNQ_IO_PLL_CTRL		0x0001E011
> -wm 32 ZYNQ_IO_PLL_CTRL		0x0001E010
> -wm 32 ZYNQ_IO_PLL_CTRL		0x0001E000
> -
> -wm 32 ZYNQ_SDIO_CLK_CTRL	0x00000a03
> -
>  /* stop */
>  wm 32 0xFFFFFFFF			0x00000000


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