Re: [PATCH 2/2] ARM: boards: Add support for PRT8ML

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Hi,

On 18.09.25 17:03, Jonas Rebmann wrote:
> +	void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR);
> +
> +	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
> +	       ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_SCTR));
> +
> +	imx8mp_cpu_lowlevel_init();


imx8mp_cpu_lowlevel_init() already has
imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_SCTR), which is equivalent to
the writel above.

Jonas, if you agree, can you send a fixup removing these first 5 lines?

Thanks,
Ahmad

> +
> +	relocate_to_current_adr();
> +	setup_c();
> +
> +	prt_prt8ml_start();
> +}
> diff --git a/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8ml.c b/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8ml.c
> new file mode 100644
> index 0000000000..913db8786f
> --- /dev/null
> +++ b/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8ml.c
> @@ -0,0 +1,1121 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019 NXP
> + */
> +
> +#include <common.h>
> +#include <soc/imx8m/ddr.h>
> +#include <soc/imx8m/lpddr4_define.h>
> +
> +static struct dram_cfg_param ddr_ddrc_cfg[] = {
> +	/** Initialize DDRC registers **/
> +	{ 0x3d400304, 0x1 },
> +	{ 0x3d400030, 0x1 },
> +	{ 0x3d400000, 0xe3080020 },
> +	{ 0x3d400020, 0x1303 },
> +	{ 0x3d400024, 0x1e84800 },
> +	{ 0x3d400064, 0x7a017c },
> +	{ 0x3d4000d0, 0xc00307a3 },
> +	{ 0x3d4000d4, 0xc50000 },
> +	{ 0x3d4000dc, 0xf4003f },
> +	{ 0x3d4000e0, 0x330000 },
> +	{ 0x3d4000e8, 0x660048 },
> +	{ 0x3d4000ec, 0x160048 },
> +	{ 0x3d400100, 0x2028222a },
> +	{ 0x3d400104, 0x8083f },
> +	{ 0x3d40010c, 0xe0e000 },
> +	{ 0x3d400110, 0x12040a12 },
> +	{ 0x3d400114, 0x2050f0f },
> +	{ 0x3d400118, 0x1010009 },
> +	{ 0x3d40011c, 0x501 },
> +	{ 0x3d400130, 0x20800 },
> +	{ 0x3d400134, 0xe100002 },
> +	{ 0x3d400138, 0x184 },
> +	{ 0x3d400144, 0xc80064 },
> +	{ 0x3d400180, 0x3e8001e },
> +	{ 0x3d400184, 0x3207a12 },
> +	{ 0x3d400188, 0x0 },
> +	{ 0x3d400190, 0x49f820e },
> +	{ 0x3d400194, 0x80303 },
> +	{ 0x3d4001b4, 0x1f0e },
> +	{ 0x3d4001a0, 0xe0400018 },
> +	{ 0x3d4001a4, 0xdf00e4 },
> +	{ 0x3d4001a8, 0x80000000 },
> +	{ 0x3d4001b0, 0x11 },
> +	{ 0x3d4001c0, 0x1 },
> +	{ 0x3d4001c4, 0x1 },
> +
> +	{ 0x3d4000f4, 0xc99 },
> +	{ 0x3d400108, 0x9121c1c },
> +	{ 0x3d400200, 0x16 },
> +	{ 0x3d40020c, 0x0 },
> +	{ 0x3d400210, 0x1f1f },
> +	{ 0x3d400204, 0x80808 },
> +	{ 0x3d400214, 0x7070707 },
> +	{ 0x3d400218, 0x68070707 },
> +	{ 0x3d40021c, 0xf08 },
> +	{ 0x3d400250, 0x00001705 },
> +	{ 0x3d400254, 0x2c },
> +	{ 0x3d40025c, 0x4000030 },
> +	{ 0x3d400264, 0x900093e7 },
> +	{ 0x3d40026c, 0x2005574 },
> +	{ 0x3d400400, 0x111 },
> +	{ 0x3d400404, 0x72ff },
> +	{ 0x3d400408, 0x72ff },
> +	{ 0x3d400494, 0x2100e07 },
> +	{ 0x3d400498, 0x620096 },
> +	{ 0x3d40049c, 0x1100e07 },
> +	{ 0x3d4004a0, 0xc8012c },
> +
> +/* DDR 200MHz clock configuration */
> +	{ 0x3d402020, 0x1001 },
> +	{ 0x3d402024, 0x30d400 },
> +	{ 0x3d402050, 0x20d000 },
> +	{ 0x3d402064, 0xc0026 },
> +	{ 0x3d4020dc, 0x840000 },
> +	{ 0x3d4020e0, 0x330000 },
> +	{ 0x3d4020e8, 0x660048 },
> +	{ 0x3d4020ec, 0x160048 },
> +	{ 0x3d402100, 0xa040305 },
> +	{ 0x3d402104, 0x30407 },
> +	{ 0x3d402108, 0x203060b },
> +	{ 0x3d40210c, 0x505000 },
> +	{ 0x3d402110, 0x2040202 },
> +	{ 0x3d402114, 0x2030202 },
> +	{ 0x3d402118, 0x1010004 },
> +	{ 0x3d40211c, 0x301 },
> +	{ 0x3d402130, 0x20300 },
> +	{ 0x3d402134, 0xa100002 },
> +	{ 0x3d402138, 0x27 },
> +	{ 0x3d402144, 0x14000a },
> +	{ 0x3d402180, 0x640004 },
> +	{ 0x3d402190, 0x3818200 },
> +	{ 0x3d402194, 0x80303 },
> +	{ 0x3d4021b4, 0x100 },
> +	{ 0x3d4020f4, 0xc99 },
> +
> +/* DDR 50MHz clock configuration */
> +	{ 0x3d403020, 0x1001 },
> +	{ 0x3d403024, 0xc3500 },
> +	{ 0x3d403050, 0x20d000 },
> +	{ 0x3d403064, 0x3000a },
> +	{ 0x3d4030dc, 0x840000 },
> +	{ 0x3d4030e0, 0x330000 },
> +	{ 0x3d4030e8, 0x660048 },
> +	{ 0x3d4030ec, 0x160048 },
> +	{ 0x3d403100, 0xa010102 },
> +	{ 0x3d403104, 0x30404 },
> +	{ 0x3d403108, 0x203060b },
> +	{ 0x3d40310c, 0x505000 },
> +	{ 0x3d403110, 0x2040202 },
> +	{ 0x3d403114, 0x2030202 },
> +	{ 0x3d403118, 0x1010004 },
> +	{ 0x3d40311c, 0x301 },
> +	{ 0x3d403130, 0x20300 },
> +	{ 0x3d403134, 0xa100002 },
> +	{ 0x3d403138, 0xa },
> +	{ 0x3d403144, 0x50003 },
> +	{ 0x3d403180, 0x190004 },
> +	{ 0x3d403190, 0x3818200 },
> +	{ 0x3d403194, 0x80303 },
> +	{ 0x3d4031b4, 0x100 },
> +	{ 0x3d4030f4, 0xc99 },
> +	{ 0x3d400028, 0x0 },
> +};
> +
> +/* PHY Initialize Configuration */
> +static struct dram_cfg_param ddr_ddrphy_cfg[] = {
> +	{ 0x100a0, 0x1 },
> +	{ 0x100a1, 0x0 },
> +	{ 0x100a2, 0x5 },
> +	{ 0x100a3, 0x3 },
> +	{ 0x100a4, 0x2 },
> +	{ 0x100a5, 0x4 },
> +	{ 0x100a6, 0x6 },
> +	{ 0x100a7, 0x7 },
> +	{ 0x110a0, 0x0 },
> +	{ 0x110a1, 0x1 },
> +	{ 0x110a2, 0x2 },
> +	{ 0x110a3, 0x3 },
> +	{ 0x110a4, 0x4 },
> +	{ 0x110a5, 0x5 },
> +	{ 0x110a6, 0x6 },
> +	{ 0x110a7, 0x7 },
> +	{ 0x120a0, 0x0 },
> +	{ 0x120a1, 0x1 },
> +	{ 0x120a2, 0x3 },
> +	{ 0x120a3, 0x2 },
> +	{ 0x120a4, 0x5 },
> +	{ 0x120a5, 0x4 },
> +	{ 0x120a6, 0x6 },
> +	{ 0x120a7, 0x7 },
> +	{ 0x130a0, 0x1 },
> +	{ 0x130a1, 0x0 },
> +	{ 0x130a2, 0x5 },
> +	{ 0x130a3, 0x3 },
> +	{ 0x130a4, 0x2 },
> +	{ 0x130a5, 0x4 },
> +	{ 0x130a6, 0x6 },
> +	{ 0x130a7, 0x7 },
> +	{ 0x1005f, 0x1ff },
> +	{ 0x1015f, 0x1ff },
> +	{ 0x1105f, 0x1ff },
> +	{ 0x1115f, 0x1ff },
> +	{ 0x1205f, 0x1ff },
> +	{ 0x1215f, 0x1ff },
> +	{ 0x1305f, 0x1ff },
> +	{ 0x1315f, 0x1ff },
> +	{ 0x11005f, 0x1ff },
> +	{ 0x11015f, 0x1ff },
> +	{ 0x11105f, 0x1ff },
> +	{ 0x11115f, 0x1ff },
> +	{ 0x11205f, 0x1ff },
> +	{ 0x11215f, 0x1ff },
> +	{ 0x11305f, 0x1ff },
> +	{ 0x11315f, 0x1ff },
> +	{ 0x21005f, 0x1ff },
> +	{ 0x21015f, 0x1ff },
> +	{ 0x21105f, 0x1ff },
> +	{ 0x21115f, 0x1ff },
> +	{ 0x21205f, 0x1ff },
> +	{ 0x21215f, 0x1ff },
> +	{ 0x21305f, 0x1ff },
> +	{ 0x21315f, 0x1ff },
> +	{ 0x55, 0x1ff },
> +	{ 0x1055, 0x1ff },
> +	{ 0x2055, 0x1ff },
> +	{ 0x3055, 0x1ff },
> +	{ 0x4055, 0x1ff },
> +	{ 0x5055, 0x1ff },
> +	{ 0x6055, 0x1ff },
> +	{ 0x7055, 0x1ff },
> +	{ 0x8055, 0x1ff },
> +	{ 0x9055, 0x1ff },
> +	{ 0x200c5, 0x18 },
> +	{ 0x1200c5, 0x7 },
> +	{ 0x2200c5, 0x7 },
> +	{ 0x2002e, 0x2 },
> +	{ 0x12002e, 0x2 },
> +	{ 0x22002e, 0x2 },
> +	{ 0x90204, 0x0 },
> +	{ 0x190204, 0x0 },
> +	{ 0x290204, 0x0 },
> +	{ 0x20024, 0x1e3 },
> +	{ 0x2003a, 0x2 },
> +	{ 0x120024, 0x1e3 },
> +	{ 0x2003a, 0x2 },
> +	{ 0x220024, 0x1e3 },
> +	{ 0x2003a, 0x2 },
> +	{ 0x20056, 0x3 },
> +	{ 0x120056, 0x3 },
> +	{ 0x220056, 0x3 },
> +	{ 0x1004d, 0xe00 },
> +	{ 0x1014d, 0xe00 },
> +	{ 0x1104d, 0xe00 },
> +	{ 0x1114d, 0xe00 },
> +	{ 0x1204d, 0xe00 },
> +	{ 0x1214d, 0xe00 },
> +	{ 0x1304d, 0xe00 },
> +	{ 0x1314d, 0xe00 },
> +	{ 0x11004d, 0xe00 },
> +	{ 0x11014d, 0xe00 },
> +	{ 0x11104d, 0xe00 },
> +	{ 0x11114d, 0xe00 },
> +	{ 0x11204d, 0xe00 },
> +	{ 0x11214d, 0xe00 },
> +	{ 0x11304d, 0xe00 },
> +	{ 0x11314d, 0xe00 },
> +	{ 0x21004d, 0xe00 },
> +	{ 0x21014d, 0xe00 },
> +	{ 0x21104d, 0xe00 },
> +	{ 0x21114d, 0xe00 },
> +	{ 0x21204d, 0xe00 },
> +	{ 0x21214d, 0xe00 },
> +	{ 0x21304d, 0xe00 },
> +	{ 0x21314d, 0xe00 },
> +	{ 0x10049, 0xeba },
> +	{ 0x10149, 0xeba },
> +	{ 0x11049, 0xeba },
> +	{ 0x11149, 0xeba },
> +	{ 0x12049, 0xeba },
> +	{ 0x12149, 0xeba },
> +	{ 0x13049, 0xeba },
> +	{ 0x13149, 0xeba },
> +	{ 0x110049, 0xeba },
> +	{ 0x110149, 0xeba },
> +	{ 0x111049, 0xeba },
> +	{ 0x111149, 0xeba },
> +	{ 0x112049, 0xeba },
> +	{ 0x112149, 0xeba },
> +	{ 0x113049, 0xeba },
> +	{ 0x113149, 0xeba },
> +	{ 0x210049, 0xeba },
> +	{ 0x210149, 0xeba },
> +	{ 0x211049, 0xeba },
> +	{ 0x211149, 0xeba },
> +	{ 0x212049, 0xeba },
> +	{ 0x212149, 0xeba },
> +	{ 0x213049, 0xeba },
> +	{ 0x213149, 0xeba },
> +	{ 0x43, 0x63 },
> +	{ 0x1043, 0x63 },
> +	{ 0x2043, 0x63 },
> +	{ 0x3043, 0x63 },
> +	{ 0x4043, 0x63 },
> +	{ 0x5043, 0x63 },
> +	{ 0x6043, 0x63 },
> +	{ 0x7043, 0x63 },
> +	{ 0x8043, 0x63 },
> +	{ 0x9043, 0x63 },
> +	{ 0x20018, 0x3 },
> +	{ 0x20075, 0x4 },
> +	{ 0x20050, 0x0 },
> +	{ 0x20008, 0x3e8 },
> +	{ 0x120008, 0x64 },
> +	{ 0x220008, 0x19 },
> +	{ 0x20088, 0x9 },
> +	{ 0x200b2, 0x104 },
> +	{ 0x10043, 0x5a1 },
> +	{ 0x10143, 0x5a1 },
> +	{ 0x11043, 0x5a1 },
> +	{ 0x11143, 0x5a1 },
> +	{ 0x12043, 0x5a1 },
> +	{ 0x12143, 0x5a1 },
> +	{ 0x13043, 0x5a1 },
> +	{ 0x13143, 0x5a1 },
> +	{ 0x1200b2, 0x104 },
> +	{ 0x110043, 0x5a1 },
> +	{ 0x110143, 0x5a1 },
> +	{ 0x111043, 0x5a1 },
> +	{ 0x111143, 0x5a1 },
> +	{ 0x112043, 0x5a1 },
> +	{ 0x112143, 0x5a1 },
> +	{ 0x113043, 0x5a1 },
> +	{ 0x113143, 0x5a1 },
> +	{ 0x2200b2, 0x104 },
> +	{ 0x210043, 0x5a1 },
> +	{ 0x210143, 0x5a1 },
> +	{ 0x211043, 0x5a1 },
> +	{ 0x211143, 0x5a1 },
> +	{ 0x212043, 0x5a1 },
> +	{ 0x212143, 0x5a1 },
> +	{ 0x213043, 0x5a1 },
> +	{ 0x213143, 0x5a1 },
> +	{ 0x200fa, 0x1 },
> +	{ 0x1200fa, 0x1 },
> +	{ 0x2200fa, 0x1 },
> +	{ 0x20019, 0x1 },
> +	{ 0x120019, 0x1 },
> +	{ 0x220019, 0x1 },
> +	{ 0x200f0, 0x660 },
> +	{ 0x200f1, 0x0 },
> +	{ 0x200f2, 0x4444 },
> +	{ 0x200f3, 0x8888 },
> +	{ 0x200f4, 0x5665 },
> +	{ 0x200f5, 0x0 },
> +	{ 0x200f6, 0x0 },
> +	{ 0x200f7, 0xf000 },
> +	{ 0x20025, 0x0 },
> +	{ 0x2002d, 0x0 },
> +	{ 0x12002d, 0x0 },
> +	{ 0x22002d, 0x0 },
> +	{ 0x2007d, 0x212 },
> +	{ 0x12007d, 0x212 },
> +	{ 0x22007d, 0x212 },
> +	{ 0x2007c, 0x61 },
> +	{ 0x12007c, 0x61 },
> +	{ 0x22007c, 0x61 },
> +	{ 0x1004a, 0x500 },
> +	{ 0x1104a, 0x500 },
> +	{ 0x1204a, 0x500 },
> +	{ 0x1304a, 0x500 },
> +	{ 0x2002c, 0x0 },
> +};
> +
> +/* P0 message block paremeter for training firmware */
> +static struct dram_cfg_param ddr_fsp0_cfg[] = {
> +	{ 0xd0000, 0x0 },
> +	{ 0x54003, 0xfa0 },
> +	{ 0x54004, 0x2 },
> +	{ 0x54005, 0x2228 },
> +	{ 0x54006, 0x14 },
> +	{ 0x54008, 0x131f },
> +	{ 0x54009, 0xc8 },
> +	{ 0x5400b, 0x2 },
> +	{ 0x5400f, 0x100 },
> +	{ 0x54012, 0x310 },
> +	{ 0x54019, 0x3ff4 },
> +	{ 0x5401a, 0x33 },
> +	{ 0x5401b, 0x4866 },
> +	{ 0x5401c, 0x4800 },
> +	{ 0x5401e, 0x16 },
> +	{ 0x5401f, 0x3ff4 },
> +	{ 0x54020, 0x33 },
> +	{ 0x54021, 0x4866 },
> +	{ 0x54022, 0x4800 },
> +	{ 0x54024, 0x16 },
> +	{ 0x5402b, 0x1000 },
> +	{ 0x5402c, 0x3 },
> +	{ 0x54032, 0xf400 },
> +	{ 0x54033, 0x333f },
> +	{ 0x54034, 0x6600 },
> +	{ 0x54035, 0x48 },
> +	{ 0x54036, 0x48 },
> +	{ 0x54037, 0x1600 },
> +	{ 0x54038, 0xf400 },
> +	{ 0x54039, 0x333f },
> +	{ 0x5403a, 0x6600 },
> +	{ 0x5403b, 0x48 },
> +	{ 0x5403c, 0x48 },
> +	{ 0x5403d, 0x1600 },
> +	{ 0xd0000, 0x1 },
> +};
> +
> +/* P1 message block paremeter for training firmware */
> +static struct dram_cfg_param ddr_fsp1_cfg[] = {
> +	{ 0xd0000, 0x0 },
> +	{ 0x54002, 0x101 },
> +	{ 0x54003, 0x190 },
> +	{ 0x54004, 0x2 },
> +	{ 0x54005, 0x2228 },
> +	{ 0x54006, 0x14 },
> +	{ 0x54008, 0x121f },
> +	{ 0x54009, 0xc8 },
> +	{ 0x5400b, 0x2 },
> +	{ 0x5400f, 0x100 },
> +	{ 0x54012, 0x310 },
> +	{ 0x54019, 0x84 },
> +	{ 0x5401a, 0x33 },
> +	{ 0x5401b, 0x4866 },
> +	{ 0x5401c, 0x4800 },
> +	{ 0x5401e, 0x16 },
> +	{ 0x5401f, 0x84 },
> +	{ 0x54020, 0x33 },
> +	{ 0x54021, 0x4866 },
> +	{ 0x54022, 0x4800 },
> +	{ 0x54024, 0x16 },
> +	{ 0x5402b, 0x1000 },
> +	{ 0x5402c, 0x3 },
> +	{ 0x54032, 0x8400 },
> +	{ 0x54033, 0x3300 },
> +	{ 0x54034, 0x6600 },
> +	{ 0x54035, 0x48 },
> +	{ 0x54036, 0x48 },
> +	{ 0x54037, 0x1600 },
> +	{ 0x54038, 0x8400 },
> +	{ 0x54039, 0x3300 },
> +	{ 0x5403a, 0x6600 },
> +	{ 0x5403b, 0x48 },
> +	{ 0x5403c, 0x48 },
> +	{ 0x5403d, 0x1600 },
> +	{ 0xd0000, 0x1 },
> +};
> +
> +/* P2 message block paremeter for training firmware */
> +static struct dram_cfg_param ddr_fsp2_cfg[] = {
> +	{ 0xd0000, 0x0 },
> +	{ 0x54002, 0x102 },
> +	{ 0x54003, 0x64 },
> +	{ 0x54004, 0x2 },
> +	{ 0x54005, 0x2228 },
> +	{ 0x54006, 0x14 },
> +	{ 0x54008, 0x121f },
> +	{ 0x54009, 0xc8 },
> +	{ 0x5400b, 0x2 },
> +	{ 0x5400f, 0x100 },
> +	{ 0x54012, 0x310 },
> +	{ 0x54019, 0x84 },
> +	{ 0x5401a, 0x33 },
> +	{ 0x5401b, 0x4866 },
> +	{ 0x5401c, 0x4800 },
> +	{ 0x5401e, 0x16 },
> +	{ 0x5401f, 0x84 },
> +	{ 0x54020, 0x33 },
> +	{ 0x54021, 0x4866 },
> +	{ 0x54022, 0x4800 },
> +	{ 0x54024, 0x16 },
> +	{ 0x5402b, 0x1000 },
> +	{ 0x5402c, 0x3 },
> +	{ 0x54032, 0x8400 },
> +	{ 0x54033, 0x3300 },
> +	{ 0x54034, 0x6600 },
> +	{ 0x54035, 0x48 },
> +	{ 0x54036, 0x48 },
> +	{ 0x54037, 0x1600 },
> +	{ 0x54038, 0x8400 },
> +	{ 0x54039, 0x3300 },
> +	{ 0x5403a, 0x6600 },
> +	{ 0x5403b, 0x48 },
> +	{ 0x5403c, 0x48 },
> +	{ 0x5403d, 0x1600 },
> +	{ 0xd0000, 0x1 },
> +};
> +
> +/* P0 2D message block paremeter for training firmware */
> +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
> +	{ 0xd0000, 0x0 },
> +	{ 0x54003, 0xfa0 },
> +	{ 0x54004, 0x2 },
> +	{ 0x54005, 0x2228 },
> +	{ 0x54006, 0x14 },
> +	{ 0x54008, 0x61 },
> +	{ 0x54009, 0xc8 },
> +	{ 0x5400b, 0x2 },
> +	{ 0x5400f, 0x100 },
> +	{ 0x54010, 0x1f7f },
> +	{ 0x54012, 0x310 },
> +	{ 0x54019, 0x3ff4 },
> +	{ 0x5401a, 0x33 },
> +	{ 0x5401b, 0x4866 },
> +	{ 0x5401c, 0x4800 },
> +	{ 0x5401e, 0x16 },
> +	{ 0x5401f, 0x3ff4 },
> +	{ 0x54020, 0x33 },
> +	{ 0x54021, 0x4866 },
> +	{ 0x54022, 0x4800 },
> +	{ 0x54024, 0x16 },
> +	{ 0x5402b, 0x1000 },
> +	{ 0x5402c, 0x3 },
> +	{ 0x54032, 0xf400 },
> +	{ 0x54033, 0x333f },
> +	{ 0x54034, 0x6600 },
> +	{ 0x54035, 0x48 },
> +	{ 0x54036, 0x48 },
> +	{ 0x54037, 0x1600 },
> +	{ 0x54038, 0xf400 },
> +	{ 0x54039, 0x333f },
> +	{ 0x5403a, 0x6600 },
> +	{ 0x5403b, 0x48 },
> +	{ 0x5403c, 0x48 },
> +	{ 0x5403d, 0x1600 },
> +	{ 0xd0000, 0x1 },
> +};
> +
> +/* DRAM PHY init engine image */
> +static struct dram_cfg_param ddr_phy_pie[] = {
> +	{ 0xd0000, 0x0 },
> +	{ 0x90000, 0x10 },
> +	{ 0x90001, 0x400 },
> +	{ 0x90002, 0x10e },
> +	{ 0x90003, 0x0 },
> +	{ 0x90004, 0x0 },
> +	{ 0x90005, 0x8 },
> +	{ 0x90029, 0xb },
> +	{ 0x9002a, 0x480 },
> +	{ 0x9002b, 0x109 },
> +	{ 0x9002c, 0x8 },
> +	{ 0x9002d, 0x448 },
> +	{ 0x9002e, 0x139 },
> +	{ 0x9002f, 0x8 },
> +	{ 0x90030, 0x478 },
> +	{ 0x90031, 0x109 },
> +	{ 0x90032, 0x0 },
> +	{ 0x90033, 0xe8 },
> +	{ 0x90034, 0x109 },
> +	{ 0x90035, 0x2 },
> +	{ 0x90036, 0x10 },
> +	{ 0x90037, 0x139 },
> +	{ 0x90038, 0xb },
> +	{ 0x90039, 0x7c0 },
> +	{ 0x9003a, 0x139 },
> +	{ 0x9003b, 0x44 },
> +	{ 0x9003c, 0x633 },
> +	{ 0x9003d, 0x159 },
> +	{ 0x9003e, 0x14f },
> +	{ 0x9003f, 0x630 },
> +	{ 0x90040, 0x159 },
> +	{ 0x90041, 0x47 },
> +	{ 0x90042, 0x633 },
> +	{ 0x90043, 0x149 },
> +	{ 0x90044, 0x4f },
> +	{ 0x90045, 0x633 },
> +	{ 0x90046, 0x179 },
> +	{ 0x90047, 0x8 },
> +	{ 0x90048, 0xe0 },
> +	{ 0x90049, 0x109 },
> +	{ 0x9004a, 0x0 },
> +	{ 0x9004b, 0x7c8 },
> +	{ 0x9004c, 0x109 },
> +	{ 0x9004d, 0x0 },
> +	{ 0x9004e, 0x1 },
> +	{ 0x9004f, 0x8 },
> +	{ 0x90050, 0x0 },
> +	{ 0x90051, 0x45a },
> +	{ 0x90052, 0x9 },
> +	{ 0x90053, 0x0 },
> +	{ 0x90054, 0x448 },
> +	{ 0x90055, 0x109 },
> +	{ 0x90056, 0x40 },
> +	{ 0x90057, 0x633 },
> +	{ 0x90058, 0x179 },
> +	{ 0x90059, 0x1 },
> +	{ 0x9005a, 0x618 },
> +	{ 0x9005b, 0x109 },
> +	{ 0x9005c, 0x40c0 },
> +	{ 0x9005d, 0x633 },
> +	{ 0x9005e, 0x149 },
> +	{ 0x9005f, 0x8 },
> +	{ 0x90060, 0x4 },
> +	{ 0x90061, 0x48 },
> +	{ 0x90062, 0x4040 },
> +	{ 0x90063, 0x633 },
> +	{ 0x90064, 0x149 },
> +	{ 0x90065, 0x0 },
> +	{ 0x90066, 0x4 },
> +	{ 0x90067, 0x48 },
> +	{ 0x90068, 0x40 },
> +	{ 0x90069, 0x633 },
> +	{ 0x9006a, 0x149 },
> +	{ 0x9006b, 0x10 },
> +	{ 0x9006c, 0x4 },
> +	{ 0x9006d, 0x18 },
> +	{ 0x9006e, 0x0 },
> +	{ 0x9006f, 0x4 },
> +	{ 0x90070, 0x78 },
> +	{ 0x90071, 0x549 },
> +	{ 0x90072, 0x633 },
> +	{ 0x90073, 0x159 },
> +	{ 0x90074, 0xd49 },
> +	{ 0x90075, 0x633 },
> +	{ 0x90076, 0x159 },
> +	{ 0x90077, 0x94a },
> +	{ 0x90078, 0x633 },
> +	{ 0x90079, 0x159 },
> +	{ 0x9007a, 0x441 },
> +	{ 0x9007b, 0x633 },
> +	{ 0x9007c, 0x149 },
> +	{ 0x9007d, 0x42 },
> +	{ 0x9007e, 0x633 },
> +	{ 0x9007f, 0x149 },
> +	{ 0x90080, 0x1 },
> +	{ 0x90081, 0x633 },
> +	{ 0x90082, 0x149 },
> +	{ 0x90083, 0x0 },
> +	{ 0x90084, 0xe0 },
> +	{ 0x90085, 0x109 },
> +	{ 0x90086, 0xa },
> +	{ 0x90087, 0x10 },
> +	{ 0x90088, 0x109 },
> +	{ 0x90089, 0x9 },
> +	{ 0x9008a, 0x3c0 },
> +	{ 0x9008b, 0x149 },
> +	{ 0x9008c, 0x9 },
> +	{ 0x9008d, 0x3c0 },
> +	{ 0x9008e, 0x159 },
> +	{ 0x9008f, 0x18 },
> +	{ 0x90090, 0x10 },
> +	{ 0x90091, 0x109 },
> +	{ 0x90092, 0x0 },
> +	{ 0x90093, 0x3c0 },
> +	{ 0x90094, 0x109 },
> +	{ 0x90095, 0x18 },
> +	{ 0x90096, 0x4 },
> +	{ 0x90097, 0x48 },
> +	{ 0x90098, 0x18 },
> +	{ 0x90099, 0x4 },
> +	{ 0x9009a, 0x58 },
> +	{ 0x9009b, 0xb },
> +	{ 0x9009c, 0x10 },
> +	{ 0x9009d, 0x109 },
> +	{ 0x9009e, 0x1 },
> +	{ 0x9009f, 0x10 },
> +	{ 0x900a0, 0x109 },
> +	{ 0x900a1, 0x5 },
> +	{ 0x900a2, 0x7c0 },
> +	{ 0x900a3, 0x109 },
> +	{ 0x40000, 0x811 },
> +	{ 0x40020, 0x880 },
> +	{ 0x40040, 0x0 },
> +	{ 0x40060, 0x0 },
> +	{ 0x40001, 0x4008 },
> +	{ 0x40021, 0x83 },
> +	{ 0x40041, 0x4f },
> +	{ 0x40061, 0x0 },
> +	{ 0x40002, 0x4040 },
> +	{ 0x40022, 0x83 },
> +	{ 0x40042, 0x51 },
> +	{ 0x40062, 0x0 },
> +	{ 0x40003, 0x811 },
> +	{ 0x40023, 0x880 },
> +	{ 0x40043, 0x0 },
> +	{ 0x40063, 0x0 },
> +	{ 0x40004, 0x720 },
> +	{ 0x40024, 0xf },
> +	{ 0x40044, 0x1740 },
> +	{ 0x40064, 0x0 },
> +	{ 0x40005, 0x16 },
> +	{ 0x40025, 0x83 },
> +	{ 0x40045, 0x4b },
> +	{ 0x40065, 0x0 },
> +	{ 0x40006, 0x716 },
> +	{ 0x40026, 0xf },
> +	{ 0x40046, 0x2001 },
> +	{ 0x40066, 0x0 },
> +	{ 0x40007, 0x716 },
> +	{ 0x40027, 0xf },
> +	{ 0x40047, 0x2800 },
> +	{ 0x40067, 0x0 },
> +	{ 0x40008, 0x716 },
> +	{ 0x40028, 0xf },
> +	{ 0x40048, 0xf00 },
> +	{ 0x40068, 0x0 },
> +	{ 0x40009, 0x720 },
> +	{ 0x40029, 0xf },
> +	{ 0x40049, 0x1400 },
> +	{ 0x40069, 0x0 },
> +	{ 0x4000a, 0xe08 },
> +	{ 0x4002a, 0xc15 },
> +	{ 0x4004a, 0x0 },
> +	{ 0x4006a, 0x0 },
> +	{ 0x4000b, 0x625 },
> +	{ 0x4002b, 0x15 },
> +	{ 0x4004b, 0x0 },
> +	{ 0x4006b, 0x0 },
> +	{ 0x4000c, 0x4028 },
> +	{ 0x4002c, 0x80 },
> +	{ 0x4004c, 0x0 },
> +	{ 0x4006c, 0x0 },
> +	{ 0x4000d, 0xe08 },
> +	{ 0x4002d, 0xc1a },
> +	{ 0x4004d, 0x0 },
> +	{ 0x4006d, 0x0 },
> +	{ 0x4000e, 0x625 },
> +	{ 0x4002e, 0x1a },
> +	{ 0x4004e, 0x0 },
> +	{ 0x4006e, 0x0 },
> +	{ 0x4000f, 0x4040 },
> +	{ 0x4002f, 0x80 },
> +	{ 0x4004f, 0x0 },
> +	{ 0x4006f, 0x0 },
> +	{ 0x40010, 0x2604 },
> +	{ 0x40030, 0x15 },
> +	{ 0x40050, 0x0 },
> +	{ 0x40070, 0x0 },
> +	{ 0x40011, 0x708 },
> +	{ 0x40031, 0x5 },
> +	{ 0x40051, 0x0 },
> +	{ 0x40071, 0x2002 },
> +	{ 0x40012, 0x8 },
> +	{ 0x40032, 0x80 },
> +	{ 0x40052, 0x0 },
> +	{ 0x40072, 0x0 },
> +	{ 0x40013, 0x2604 },
> +	{ 0x40033, 0x1a },
> +	{ 0x40053, 0x0 },
> +	{ 0x40073, 0x0 },
> +	{ 0x40014, 0x708 },
> +	{ 0x40034, 0xa },
> +	{ 0x40054, 0x0 },
> +	{ 0x40074, 0x2002 },
> +	{ 0x40015, 0x4040 },
> +	{ 0x40035, 0x80 },
> +	{ 0x40055, 0x0 },
> +	{ 0x40075, 0x0 },
> +	{ 0x40016, 0x60a },
> +	{ 0x40036, 0x15 },
> +	{ 0x40056, 0x1200 },
> +	{ 0x40076, 0x0 },
> +	{ 0x40017, 0x61a },
> +	{ 0x40037, 0x15 },
> +	{ 0x40057, 0x1300 },
> +	{ 0x40077, 0x0 },
> +	{ 0x40018, 0x60a },
> +	{ 0x40038, 0x1a },
> +	{ 0x40058, 0x1200 },
> +	{ 0x40078, 0x0 },
> +	{ 0x40019, 0x642 },
> +	{ 0x40039, 0x1a },
> +	{ 0x40059, 0x1300 },
> +	{ 0x40079, 0x0 },
> +	{ 0x4001a, 0x4808 },
> +	{ 0x4003a, 0x880 },
> +	{ 0x4005a, 0x0 },
> +	{ 0x4007a, 0x0 },
> +	{ 0x900a4, 0x0 },
> +	{ 0x900a5, 0x790 },
> +	{ 0x900a6, 0x11a },
> +	{ 0x900a7, 0x8 },
> +	{ 0x900a8, 0x7aa },
> +	{ 0x900a9, 0x2a },
> +	{ 0x900aa, 0x10 },
> +	{ 0x900ab, 0x7b2 },
> +	{ 0x900ac, 0x2a },
> +	{ 0x900ad, 0x0 },
> +	{ 0x900ae, 0x7c8 },
> +	{ 0x900af, 0x109 },
> +	{ 0x900b0, 0x10 },
> +	{ 0x900b1, 0x10 },
> +	{ 0x900b2, 0x109 },
> +	{ 0x900b3, 0x10 },
> +	{ 0x900b4, 0x2a8 },
> +	{ 0x900b5, 0x129 },
> +	{ 0x900b6, 0x8 },
> +	{ 0x900b7, 0x370 },
> +	{ 0x900b8, 0x129 },
> +	{ 0x900b9, 0xa },
> +	{ 0x900ba, 0x3c8 },
> +	{ 0x900bb, 0x1a9 },
> +	{ 0x900bc, 0xc },
> +	{ 0x900bd, 0x408 },
> +	{ 0x900be, 0x199 },
> +	{ 0x900bf, 0x14 },
> +	{ 0x900c0, 0x790 },
> +	{ 0x900c1, 0x11a },
> +	{ 0x900c2, 0x8 },
> +	{ 0x900c3, 0x4 },
> +	{ 0x900c4, 0x18 },
> +	{ 0x900c5, 0xe },
> +	{ 0x900c6, 0x408 },
> +	{ 0x900c7, 0x199 },
> +	{ 0x900c8, 0x8 },
> +	{ 0x900c9, 0x8568 },
> +	{ 0x900ca, 0x108 },
> +	{ 0x900cb, 0x18 },
> +	{ 0x900cc, 0x790 },
> +	{ 0x900cd, 0x16a },
> +	{ 0x900ce, 0x8 },
> +	{ 0x900cf, 0x1d8 },
> +	{ 0x900d0, 0x169 },
> +	{ 0x900d1, 0x10 },
> +	{ 0x900d2, 0x8558 },
> +	{ 0x900d3, 0x168 },
> +	{ 0x900d4, 0x70 },
> +	{ 0x900d5, 0x788 },
> +	{ 0x900d6, 0x16a },
> +	{ 0x900d7, 0x1ff8 },
> +	{ 0x900d8, 0x85a8 },
> +	{ 0x900d9, 0x1e8 },
> +	{ 0x900da, 0x50 },
> +	{ 0x900db, 0x798 },
> +	{ 0x900dc, 0x16a },
> +	{ 0x900dd, 0x60 },
> +	{ 0x900de, 0x7a0 },
> +	{ 0x900df, 0x16a },
> +	{ 0x900e0, 0x8 },
> +	{ 0x900e1, 0x8310 },
> +	{ 0x900e2, 0x168 },
> +	{ 0x900e3, 0x8 },
> +	{ 0x900e4, 0xa310 },
> +	{ 0x900e5, 0x168 },
> +	{ 0x900e6, 0xa },
> +	{ 0x900e7, 0x408 },
> +	{ 0x900e8, 0x169 },
> +	{ 0x900e9, 0x6e },
> +	{ 0x900ea, 0x0 },
> +	{ 0x900eb, 0x68 },
> +	{ 0x900ec, 0x0 },
> +	{ 0x900ed, 0x408 },
> +	{ 0x900ee, 0x169 },
> +	{ 0x900ef, 0x0 },
> +	{ 0x900f0, 0x8310 },
> +	{ 0x900f1, 0x168 },
> +	{ 0x900f2, 0x0 },
> +	{ 0x900f3, 0xa310 },
> +	{ 0x900f4, 0x168 },
> +	{ 0x900f5, 0x1ff8 },
> +	{ 0x900f6, 0x85a8 },
> +	{ 0x900f7, 0x1e8 },
> +	{ 0x900f8, 0x68 },
> +	{ 0x900f9, 0x798 },
> +	{ 0x900fa, 0x16a },
> +	{ 0x900fb, 0x78 },
> +	{ 0x900fc, 0x7a0 },
> +	{ 0x900fd, 0x16a },
> +	{ 0x900fe, 0x68 },
> +	{ 0x900ff, 0x790 },
> +	{ 0x90100, 0x16a },
> +	{ 0x90101, 0x8 },
> +	{ 0x90102, 0x8b10 },
> +	{ 0x90103, 0x168 },
> +	{ 0x90104, 0x8 },
> +	{ 0x90105, 0xab10 },
> +	{ 0x90106, 0x168 },
> +	{ 0x90107, 0xa },
> +	{ 0x90108, 0x408 },
> +	{ 0x90109, 0x169 },
> +	{ 0x9010a, 0x58 },
> +	{ 0x9010b, 0x0 },
> +	{ 0x9010c, 0x68 },
> +	{ 0x9010d, 0x0 },
> +	{ 0x9010e, 0x408 },
> +	{ 0x9010f, 0x169 },
> +	{ 0x90110, 0x0 },
> +	{ 0x90111, 0x8b10 },
> +	{ 0x90112, 0x168 },
> +	{ 0x90113, 0x1 },
> +	{ 0x90114, 0xab10 },
> +	{ 0x90115, 0x168 },
> +	{ 0x90116, 0x0 },
> +	{ 0x90117, 0x1d8 },
> +	{ 0x90118, 0x169 },
> +	{ 0x90119, 0x80 },
> +	{ 0x9011a, 0x790 },
> +	{ 0x9011b, 0x16a },
> +	{ 0x9011c, 0x18 },
> +	{ 0x9011d, 0x7aa },
> +	{ 0x9011e, 0x6a },
> +	{ 0x9011f, 0xa },
> +	{ 0x90120, 0x0 },
> +	{ 0x90121, 0x1e9 },
> +	{ 0x90122, 0x8 },
> +	{ 0x90123, 0x8080 },
> +	{ 0x90124, 0x108 },
> +	{ 0x90125, 0xf },
> +	{ 0x90126, 0x408 },
> +	{ 0x90127, 0x169 },
> +	{ 0x90128, 0xc },
> +	{ 0x90129, 0x0 },
> +	{ 0x9012a, 0x68 },
> +	{ 0x9012b, 0x9 },
> +	{ 0x9012c, 0x0 },
> +	{ 0x9012d, 0x1a9 },
> +	{ 0x9012e, 0x0 },
> +	{ 0x9012f, 0x408 },
> +	{ 0x90130, 0x169 },
> +	{ 0x90131, 0x0 },
> +	{ 0x90132, 0x8080 },
> +	{ 0x90133, 0x108 },
> +	{ 0x90134, 0x8 },
> +	{ 0x90135, 0x7aa },
> +	{ 0x90136, 0x6a },
> +	{ 0x90137, 0x0 },
> +	{ 0x90138, 0x8568 },
> +	{ 0x90139, 0x108 },
> +	{ 0x9013a, 0xb7 },
> +	{ 0x9013b, 0x790 },
> +	{ 0x9013c, 0x16a },
> +	{ 0x9013d, 0x1f },
> +	{ 0x9013e, 0x0 },
> +	{ 0x9013f, 0x68 },
> +	{ 0x90140, 0x8 },
> +	{ 0x90141, 0x8558 },
> +	{ 0x90142, 0x168 },
> +	{ 0x90143, 0xf },
> +	{ 0x90144, 0x408 },
> +	{ 0x90145, 0x169 },
> +	{ 0x90146, 0xd },
> +	{ 0x90147, 0x0 },
> +	{ 0x90148, 0x68 },
> +	{ 0x90149, 0x0 },
> +	{ 0x9014a, 0x408 },
> +	{ 0x9014b, 0x169 },
> +	{ 0x9014c, 0x0 },
> +	{ 0x9014d, 0x8558 },
> +	{ 0x9014e, 0x168 },
> +	{ 0x9014f, 0x8 },
> +	{ 0x90150, 0x3c8 },
> +	{ 0x90151, 0x1a9 },
> +	{ 0x90152, 0x3 },
> +	{ 0x90153, 0x370 },
> +	{ 0x90154, 0x129 },
> +	{ 0x90155, 0x20 },
> +	{ 0x90156, 0x2aa },
> +	{ 0x90157, 0x9 },
> +	{ 0x90158, 0x8 },
> +	{ 0x90159, 0xe8 },
> +	{ 0x9015a, 0x109 },
> +	{ 0x9015b, 0x0 },
> +	{ 0x9015c, 0x8140 },
> +	{ 0x9015d, 0x10c },
> +	{ 0x9015e, 0x10 },
> +	{ 0x9015f, 0x8138 },
> +	{ 0x90160, 0x104 },
> +	{ 0x90161, 0x8 },
> +	{ 0x90162, 0x448 },
> +	{ 0x90163, 0x109 },
> +	{ 0x90164, 0xf },
> +	{ 0x90165, 0x7c0 },
> +	{ 0x90166, 0x109 },
> +	{ 0x90167, 0x0 },
> +	{ 0x90168, 0xe8 },
> +	{ 0x90169, 0x109 },
> +	{ 0x9016a, 0x47 },
> +	{ 0x9016b, 0x630 },
> +	{ 0x9016c, 0x109 },
> +	{ 0x9016d, 0x8 },
> +	{ 0x9016e, 0x618 },
> +	{ 0x9016f, 0x109 },
> +	{ 0x90170, 0x8 },
> +	{ 0x90171, 0xe0 },
> +	{ 0x90172, 0x109 },
> +	{ 0x90173, 0x0 },
> +	{ 0x90174, 0x7c8 },
> +	{ 0x90175, 0x109 },
> +	{ 0x90176, 0x8 },
> +	{ 0x90177, 0x8140 },
> +	{ 0x90178, 0x10c },
> +	{ 0x90179, 0x0 },
> +	{ 0x9017a, 0x478 },
> +	{ 0x9017b, 0x109 },
> +	{ 0x9017c, 0x0 },
> +	{ 0x9017d, 0x1 },
> +	{ 0x9017e, 0x8 },
> +	{ 0x9017f, 0x8 },
> +	{ 0x90180, 0x4 },
> +	{ 0x90181, 0x0 },
> +	{ 0x90006, 0x8 },
> +	{ 0x90007, 0x7c8 },
> +	{ 0x90008, 0x109 },
> +	{ 0x90009, 0x0 },
> +	{ 0x9000a, 0x400 },
> +	{ 0x9000b, 0x106 },
> +	{ 0xd00e7, 0x400 },
> +	{ 0x90017, 0x0 },
> +	{ 0x9001f, 0x29 },
> +	{ 0x90026, 0x68 },
> +	{ 0x400d0, 0x0 },
> +	{ 0x400d1, 0x101 },
> +	{ 0x400d2, 0x105 },
> +	{ 0x400d3, 0x107 },
> +	{ 0x400d4, 0x10f },
> +	{ 0x400d5, 0x202 },
> +	{ 0x400d6, 0x20a },
> +	{ 0x400d7, 0x20b },
> +	{ 0x2003a, 0x2 },
> +	{ 0x200be, 0x3 },
> +	{ 0x2000b, 0x7d },
> +	{ 0x2000c, 0xfa },
> +	{ 0x2000d, 0x9c4 },
> +	{ 0x2000e, 0x2c },
> +	{ 0x12000b, 0xc },
> +	{ 0x12000c, 0x19 },
> +	{ 0x12000d, 0xfa },
> +	{ 0x12000e, 0x10 },
> +	{ 0x22000b, 0x3 },
> +	{ 0x22000c, 0x6 },
> +	{ 0x22000d, 0x3e },
> +	{ 0x22000e, 0x10 },
> +	{ 0x9000c, 0x0 },
> +	{ 0x9000d, 0x173 },
> +	{ 0x9000e, 0x60 },
> +	{ 0x9000f, 0x6110 },
> +	{ 0x90010, 0x2152 },
> +	{ 0x90011, 0xdfbd },
> +	{ 0x90012, 0x2060 },
> +	{ 0x90013, 0x6152 },
> +	{ 0x20010, 0x5a },
> +	{ 0x20011, 0x3 },
> +	{ 0x40080, 0xe0 },
> +	{ 0x40081, 0x12 },
> +	{ 0x40082, 0xe0 },
> +	{ 0x40083, 0x12 },
> +	{ 0x40084, 0xe0 },
> +	{ 0x40085, 0x12 },
> +	{ 0x140080, 0xe0 },
> +	{ 0x140081, 0x12 },
> +	{ 0x140082, 0xe0 },
> +	{ 0x140083, 0x12 },
> +	{ 0x140084, 0xe0 },
> +	{ 0x140085, 0x12 },
> +	{ 0x240080, 0xe0 },
> +	{ 0x240081, 0x12 },
> +	{ 0x240082, 0xe0 },
> +	{ 0x240083, 0x12 },
> +	{ 0x240084, 0xe0 },
> +	{ 0x240085, 0x12 },
> +	{ 0x400fd, 0xf },
> +	{ 0x10011, 0x1 },
> +	{ 0x10012, 0x1 },
> +	{ 0x10013, 0x180 },
> +	{ 0x10018, 0x1 },
> +	{ 0x10002, 0x6209 },
> +	{ 0x100b2, 0x1 },
> +	{ 0x101b4, 0x1 },
> +	{ 0x102b4, 0x1 },
> +	{ 0x103b4, 0x1 },
> +	{ 0x104b4, 0x1 },
> +	{ 0x105b4, 0x1 },
> +	{ 0x106b4, 0x1 },
> +	{ 0x107b4, 0x1 },
> +	{ 0x108b4, 0x1 },
> +	{ 0x11011, 0x1 },
> +	{ 0x11012, 0x1 },
> +	{ 0x11013, 0x180 },
> +	{ 0x11018, 0x1 },
> +	{ 0x11002, 0x6209 },
> +	{ 0x110b2, 0x1 },
> +	{ 0x111b4, 0x1 },
> +	{ 0x112b4, 0x1 },
> +	{ 0x113b4, 0x1 },
> +	{ 0x114b4, 0x1 },
> +	{ 0x115b4, 0x1 },
> +	{ 0x116b4, 0x1 },
> +	{ 0x117b4, 0x1 },
> +	{ 0x118b4, 0x1 },
> +	{ 0x12011, 0x1 },
> +	{ 0x12012, 0x1 },
> +	{ 0x12013, 0x180 },
> +	{ 0x12018, 0x1 },
> +	{ 0x12002, 0x6209 },
> +	{ 0x120b2, 0x1 },
> +	{ 0x121b4, 0x1 },
> +	{ 0x122b4, 0x1 },
> +	{ 0x123b4, 0x1 },
> +	{ 0x124b4, 0x1 },
> +	{ 0x125b4, 0x1 },
> +	{ 0x126b4, 0x1 },
> +	{ 0x127b4, 0x1 },
> +	{ 0x128b4, 0x1 },
> +	{ 0x13011, 0x1 },
> +	{ 0x13012, 0x1 },
> +	{ 0x13013, 0x180 },
> +	{ 0x13018, 0x1 },
> +	{ 0x13002, 0x6209 },
> +	{ 0x130b2, 0x1 },
> +	{ 0x131b4, 0x1 },
> +	{ 0x132b4, 0x1 },
> +	{ 0x133b4, 0x1 },
> +	{ 0x134b4, 0x1 },
> +	{ 0x135b4, 0x1 },
> +	{ 0x136b4, 0x1 },
> +	{ 0x137b4, 0x1 },
> +	{ 0x138b4, 0x1 },
> +	{ 0x20089, 0x1 },
> +	{ 0x20088, 0x19 },
> +	{ 0xc0080, 0x2 },
> +	{ 0xd0000, 0x1 }
> +};
> +
> +static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
> +	{
> +		/* P0 4000mts 1D */
> +		.drate = 4000,
> +		.fw_type = FW_1D_IMAGE,
> +		.fsp_cfg = ddr_fsp0_cfg,
> +		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
> +	},
> +	{
> +		/* P1 400mts 1D */
> +		.drate = 400,
> +		.fw_type = FW_1D_IMAGE,
> +		.fsp_cfg = ddr_fsp1_cfg,
> +		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
> +	},
> +	{
> +		/* P2 100mts 1D */
> +		.drate = 100,
> +		.fw_type = FW_1D_IMAGE,
> +		.fsp_cfg = ddr_fsp2_cfg,
> +		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
> +	},
> +	{
> +		/* P0 4000mts 2D */
> +		.drate = 4000,
> +		.fw_type = FW_2D_IMAGE,
> +		.fsp_cfg = ddr_fsp0_2d_cfg,
> +		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
> +	},
> +};
> +
> +/* ddr timing config params */
> +struct dram_timing_info prt8ml_dram_timing = {
> +	.ddrc_cfg = ddr_ddrc_cfg,
> +	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
> +	.ddrphy_cfg = ddr_ddrphy_cfg,
> +	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
> +	.fsp_msg = ddr_dram_fsp_msg,
> +	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
> +	.ddrphy_pie = ddr_phy_pie,
> +	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
> +	.fsp_table = { 4000, 400, 100, },
> +};
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 021573a266..4f63905936 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -110,7 +110,9 @@ lwl-$(CONFIG_MACH_PROTONIC_IMX6) += \
>  	imx6qp-vicutp.dtb.o \
>  	imx6ul-prti6g.dtb.o \
>  	imx6ull-jozacp.dtb.o
> -lwl-$(CONFIG_MACH_PROTONIC_IMX8M) += imx8mm-prt8mm.dtb.o
> +lwl-$(CONFIG_MACH_PROTONIC_IMX8M) += \
> +	imx8mm-prt8mm.dtb.o \
> +	imx8mp-prt8ml.dtb.o
>  lwl-$(CONFIG_MACH_PROTONIC_MECSBC) += rk3568-mecsbc.dtb.o
>  lwl-$(CONFIG_MACH_PROTONIC_PRTPUK) += rk3576-prtpuk.dtb.o
>  lwl-$(CONFIG_MACH_PROTONIC_STM32MP1) += \
> diff --git a/arch/arm/dts/imx8mp-prt8ml.dts b/arch/arm/dts/imx8mp-prt8ml.dts
> new file mode 100644
> index 0000000000..4072d595ad
> --- /dev/null
> +++ b/arch/arm/dts/imx8mp-prt8ml.dts
> @@ -0,0 +1,48 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * 2025 Pengutronix, Jonas Rebmann <kernel@pengutronix.de>
> + */
> +
> +/dts-v1/;
> +#include "imx8mp-prt8ml.dtsi"
> +
> +/ {
> +	chosen {
> +		environment-sd {
> +			compatible = "barebox,environment";
> +			device-path = &part_env_sd;
> +			status = "disabled";
> +		};
> +		environment-emmc {
> +			compatible = "barebox,environment";
> +			device-path = &part_env_emmc;
> +			status = "disabled";
> +		};
> +	};
> +};
> +
> +
> +&usdhc2 {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	partition@0 {
> +		label = "barebox";
> +		reg = <0x0 0xe0000>;
> +	};
> +
> +	part_env_sd: partition@e0000 {
> +		label = "barebox-environment";
> +		reg = <0xe0000 0x20000>;
> +	};
> +};
> +
> +&usdhc3 {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	part_env_emmc: partition@e0000 {
> +		label = "barebox-environment";
> +		reg = <0xe0000 0x20000>;
> +	};
> +};
> diff --git a/arch/arm/dts/imx8mp-prt8ml.dtsi b/arch/arm/dts/imx8mp-prt8ml.dtsi
> new file mode 100644
> index 0000000000..05bf6b9246
> --- /dev/null
> +++ b/arch/arm/dts/imx8mp-prt8ml.dtsi
> @@ -0,0 +1,500 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2020 Protonic Holland
> + * Copyright 2019 NXP
> + */
> +
> +/dts-v1/;
> +
> +#include <arm64/freescale/imx8mp.dtsi>
> +
> +/ {
> +	model = "Protonic PRT8ML";
> +	compatible = "prt,prt8ml", "fsl,imx8mp";
> +
> +	chosen {
> +		stdout-path = &uart4;
> +	};
> +
> +	pcie_refclk: pcie0-refclk {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <100000000>;
> +	};
> +
> +	pcie_refclk_oe: pcie0-refclk-oe {
> +		compatible = "gpio-gate-clock";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_pcie_refclk>;
> +		clocks = <&pcie_refclk>;
> +		#clock-cells = <0>;
> +		enable-gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
> +	};
> +};
> +
> +&A53_0 {
> +	cpu-supply = <&fan53555>;
> +};
> +
> +&A53_1 {
> +	cpu-supply = <&fan53555>;
> +};
> +
> +&A53_2 {
> +	cpu-supply = <&fan53555>;
> +};
> +
> +&A53_3 {
> +	cpu-supply = <&fan53555>;
> +};
> +
> +&a53_opp_table {
> +	opp-1200000000 {
> +		opp-microvolt = <900000>;
> +	};
> +
> +	opp-1600000000 {
> +		opp-microvolt = <980000>;
> +	};
> +
> +	/delete-node/ opp-1800000000;
> +};
> +
> +&ecspi2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_ecspi2>;
> +	cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
> +	/delete-property/ dmas;
> +	/delete-property/ dma-names;
> +	status = "okay";
> +
> +	switch@0 {
> +		compatible = "nxp,sja1105q";
> +		reg = <0>;
> +		reset-gpios = <&gpio_exp_1 4 GPIO_ACTIVE_LOW>;
> +		spi-cpha;
> +		spi-max-frequency = <4000000>;
> +		spi-rx-delay-us = <1>;
> +		spi-tx-delay-us = <1>;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@3 {
> +				reg = <3>;
> +				label = "rj45";
> +				phy-handle = <&rj45_phy>;
> +				phy-mode = "rgmii-id";
> +			};
> +
> +			port@4 {
> +				reg = <4>;
> +				ethernet = <&fec>;
> +				label = "cpu";
> +				phy-mode = "rgmii-id";
> +				rx-internal-delay-ps = <2000>;
> +				tx-internal-delay-ps = <2000>;
> +
> +				fixed-link {
> +					full-duplex;
> +					speed = <100>;
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&fec {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_fec>;
> +	phy-mode = "rgmii"; /* switch inserts delay */
> +	rx-internal-delay-ps = <0>;
> +	tx-internal-delay-ps = <0>;
> +	status = "okay";
> +
> +	fixed-link {
> +		full-duplex;
> +		speed = <100>;
> +	};
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		rj45_phy: ethernet-phy@2 {
> +			reg = <2>;
> +			reset-gpios = <&gpio_exp_1 1 GPIO_ACTIVE_LOW>;
> +			reset-assert-us = <10000>;
> +			reset-deassert-us = <80000>;
> +		};
> +	};
> +};
> +
> +&flexcan1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan1>;
> +	status = "okay";
> +};
> +
> +&flexcan2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan2>;
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	clock-frequency = <400000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c1>;
> +	status = "okay";
> +
> +	ak5558: codec@10 {
> +		compatible = "asahi-kasei,ak5558";
> +		reg = <0x10>;
> +		reset-gpios = <&gpio_exp_1 2 GPIO_ACTIVE_LOW>;
> +	};
> +
> +	gpio_exp_1: gpio@25 {
> +		compatible = "nxp,pca9571";
> +		reg = <0x25>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +	};
> +};
> +
> +&i2c2 {
> +	clock-frequency = <400000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c2>;
> +	status = "okay";
> +
> +	tps65987ddh_0: usb-pd@20 {
> +		compatible = "ti,tps6598x";
> +		reg = <0x20>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_tps65987ddh_0>;
> +		interrupts-extended = <&gpio1 12 IRQ_TYPE_LEVEL_LOW>;
> +	};
> +
> +	gpio_exp_2: gpio@25 {
> +		compatible = "nxp,pca9571";
> +		reg = <0x25>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +
> +		c0-hreset-hog {
> +			gpio-hog;
> +			gpios = <7 GPIO_ACTIVE_LOW>;
> +			line-name = "c0-hreset";
> +			output-low;
> +		};
> +
> +		c1-hreset-hog {
> +			gpio-hog;
> +			gpios = <6 GPIO_ACTIVE_LOW>;
> +			line-name = "c1-hreset";
> +			output-low;
> +		};
> +	};
> +
> +	fan53555: regulator@60 {
> +		compatible = "fcs,fan53555";
> +		reg = <0x60>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_fan53555>;
> +		regulator-name = "fan53555";
> +		regulator-min-microvolt = <900000>;
> +		regulator-max-microvolt = <980000>;
> +		regulator-always-on;
> +		regulator-boot-on;
> +		fcs,suspend-voltage-selector = <1>;
> +	};
> +};
> +
> +&i2c3 {
> +	clock-frequency = <400000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c3>;
> +	status = "okay";
> +
> +	ak4458: codec@11 {
> +		compatible = "asahi-kasei,ak4458";
> +		reg = <0x11>;
> +		#sound-dai-cells = <0>;
> +		reset-gpios = <&gpio_exp_2 5 GPIO_ACTIVE_LOW>;
> +	};
> +
> +	tps65987ddh_1: usb-pd@20 {
> +		compatible = "ti,tps6598x";
> +		reg = <0x20>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_tps65987ddh_1>;
> +		interrupts-extended = <&gpio1 15 IRQ_TYPE_LEVEL_LOW>;
> +	};
> +};
> +
> +&lcdif1 {
> +	status = "okay";
> +};
> +
> +&snvs_pwrkey {
> +	status = "okay";
> +};
> +
> +&uart4 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart4>;
> +	status = "okay";
> +};
> +
> +&usb3_0 {
> +	status = "okay";
> +};
> +
> +&usb3_1 {
> +	status = "okay";
> +};
> +
> +&usb3_phy0 {
> +	status = "okay";
> +};
> +
> +&usb3_phy1 {
> +	status = "okay";
> +};
> +
> +&usb_dwc3_0 {
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usb_dwc3_1 {
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usdhc2 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> +	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> +	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> +	assigned-clock-rates = <100000000>;
> +	bus-width = <4>;
> +	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> +	no-1-8-v;
> +	sd-uhs-sdr12;
> +	sd-uhs-sdr25;
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC3_ROOT>;
> +	assigned-clock-rates = <400000000>;
> +	bus-width = <8>;
> +	non-removable;
> +	no-sdio;
> +	no-sd;
> +	status = "okay";
> +};
> +
> +&wdog1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_wdog>;
> +	fsl,ext-reset-output;
> +	status = "okay";
> +};
> +
> +&iomuxc {
> +	pinctrl_ecspi2: ecspi2grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x154
> +			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x154
> +			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x154
> +			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x154
> +		>;
> +	};
> +
> +	pinctrl_fan53555: fan53555grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05		0x114
> +		>;
> +	};
> +
> +	pinctrl_fec: fecgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x3
> +			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x3
> +			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x91
> +			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x91
> +			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x91
> +			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x91
> +			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x91
> +			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x91
> +			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x1f
> +			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x1f
> +			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x1f
> +			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x1f
> +			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x1f
> +			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x1f
> +		>;
> +	};
> +
> +	pinctrl_flexcan1: flexcan1grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX		0x154
> +			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX		0x154
> +		>;
> +	};
> +
> +	pinctrl_flexcan2: flexcan2grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_UART3_TXD__CAN2_RX		0x154
> +			MX8MP_IOMUXC_UART3_RXD__CAN2_TX		0x154
> +		>;
> +	};
> +
> +	pinctrl_i2c1: i2c1grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_ECSPI1_SCLK__I2C1_SCL	0x400000c3
> +			MX8MP_IOMUXC_ECSPI1_MOSI__I2C1_SDA	0x400000c3
> +		>;
> +	};
> +
> +	pinctrl_i2c2: i2c2grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400000c3
> +			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400000c3
> +		>;
> +	};
> +
> +	pinctrl_i2c3: i2c3grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400000c3
> +			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400000c3
> +		>;
> +	};
> +
> +	pinctrl_pcie_refclk: pcierefclkgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_UART1_TXD__GPIO5_IO23	0xc6
> +		>;
> +	};
> +
> +	pinctrl_tps65987ddh_0: tps65987ddh_0grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x1d0
> +		>;
> +	};
> +
> +	pinctrl_tps65987ddh_1: tps65987ddh_1grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15	0x1d0
> +		>;
> +	};
> +
> +	pinctrl_uart4: uart4grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX		0x040
> +			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX		0x040
> +		>;
> +	};
> +
> +	pinctrl_usdhc2: usdhc2grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190
> +			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0
> +			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0
> +			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0
> +			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0
> +			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0
> +		>;
> +	};
> +
> +	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194
> +			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4
> +			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4
> +			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4
> +			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4
> +			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4
> +		>;
> +	};
> +
> +	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196
> +			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6
> +			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6
> +			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6
> +			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6
> +			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6
> +		>;
> +	};
> +
> +	pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x0d4
> +		>;
> +	};
> +
> +	pinctrl_usdhc3: usdhc3grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x190
> +			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d0
> +			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d0
> +			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d0
> +			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d0
> +			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d0
> +			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d0
> +			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d0
> +			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d0
> +			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d0
> +			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x190
> +		>;
> +	};
> +
> +	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x194
> +			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d4
> +			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d4
> +			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d4
> +			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d4
> +			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d4
> +			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d4
> +			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d4
> +			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d4
> +			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d4
> +			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x194
> +		>;
> +	};
> +
> +	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK		0x196
> +			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD		0x1d6
> +			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0		0x1d6
> +			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1		0x1d6
> +			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2		0x1d6
> +			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3		0x1d6
> +			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4		0x1d6
> +			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5		0x1d6
> +			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6		0x1d6
> +			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7		0x1d6
> +			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE		0x196
> +		>;
> +	};
> +
> +	pinctrl_wdog: wdoggrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B		0x166
> +		>;
> +	};
> +};
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index 0d745ce231..eb5fc61909 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -701,8 +701,10 @@ config MACH_POLYHEX_DEBIX
>  config MACH_PROTONIC_IMX8M
>  	bool "Protonic-Holland i.MX8Mx based boards"
>  	select ARCH_IMX8MM
> -	select FIRMWARE_IMX_LPDDR4_PMU_TRAIN
> +	select ARCH_IMX8MP
>  	select FIRMWARE_IMX8MM_ATF
> +	select FIRMWARE_IMX8MP_ATF
> +	select FIRMWARE_IMX_LPDDR4_PMU_TRAIN
>  	select ARM_SMCCC
>  	select MCI_IMX_ESDHC_PBL
>  	select IMX8M_DRAM
> diff --git a/images/Makefile.imx b/images/Makefile.imx
> index 93264254e9..aa1434624a 100644
> --- a/images/Makefile.imx
> +++ b/images/Makefile.imx
> @@ -487,6 +487,8 @@ $(call build_imx8m_habv4img, CONFIG_MACH_POLYHEX_DEBIX, start_polyhex_debix, pol
>  
>  $(call build_imx8m_habv4img, CONFIG_MACH_POLYHEX_DEBIX, start_polyhex_debix_som_a_8g, polyhex-debix/flash-header-polyhex-debix, polyhex-debix-som-a-8g)
>  
> +$(call build_imx8m_habv4img, CONFIG_MACH_PROTONIC_IMX8M, start_prt_prt8ml, protonic-imx8m/flash-header-prt8ml, prt-prt8ml)
> +
>  $(call build_imx8m_habv4img, CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP, start_variscite_imx8mp_dart, variscite-dt8mcustomboard-imx8mp/flash-header-imx8mp-dart, variscite-imx8mp-dart-cb)
>  
>  # ----------------------- i.MX8mq based boards --------------------------
> 


-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |