Hi Sascha,
    >> You have to adjust the TEXT_BASE in arch/arm/mach-imx/Kconfig so that the
resulting link address is is your address space.

        I have changed the TEXT_BASE to 0xA1F000000. Now it is pointing to 31st MB of 1st chip select. I did not understand what do you mean by " resulting link address is your address space " ?

According to TEXT_BASE at 0xA1F000000, i have following stack and malloc area's

                     Malloc space: 0xa1900000 -> 0xa1f00000 (size 6 MB)
                     Stack space : 0xa18f8000 -> 0xa1900000 (size 32 kB)

    >> For Linux you have to adjust the device size of the device which is passed to armlinux_add_dram() to 64MB.

I am adding two device using armlinux_add_dram() each with 32MB size and map_base address of 0xA0000000 and 0xB0000000 respectively.. Is that fine or Can I have one device registered with map_base address of 0xA0000000 and 64MB size??

I have enabled MMU in barebox. There also i have a change for arm_create_section(). Following is section of code i have in pcm038_mmu_init()

static void pcm038_mmu_init(void)
{
        mmu_init();

        arm_create_section(0xa0000000, 0xa0000000, 32, PMD_SECT_DEF_CACHED);
        arm_create_section(0xb0000000, 0xa0000000, 32, PMD_SECT_DEF_UNCACHED);

        setup_dma_coherent(0x10000000);

#if TEXT_BASE & (0x100000 - 1)
#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
#else
        arm_create_section(0x0,        TEXT_BASE,   1, PMD_SECT_DEF_UNCACHED);
#endif
        mmu_enable();
}

With all these changes, I see ping command hangs.. :(

   If I replace the macro from PMD_SECT_DEF_UNCACHED to PMD_SECT_DEF_CACHED in the function pcm038_mmu_init(), the ping command throws some transmission timeout messages and exits saying the the destination is not Alive.

It would be great if you can help me out!!

Thanks,
Kuldeep.

On Mon, Aug 16, 2010 at 2:43 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:

Hi,

On Fri, Aug 13, 2010 at 08:47:38PM +0530, kuldeep ghan wrote:
> Hi,
> I am using PCM038 based custom board with changes in Memory
> configuration. I want to know what all changes i have to do in barebox
> source if I am reducing the size of DDR to 64 MB.
> I have two 32MB DDR chips interfaced on CSD0 and CSD1. I am able to boot the
> board with changes in pcm038 and lowlevel_init.S. I see that both the DDRs
> are initialized properly and able to write and read to DDR address space.
> Ping to command is failing with these changes. And I am not sure
> about the changes required for stack size and malloc size.

You have to adjust the TEXT_BASE in arch/arm/mach-imx/Kconfig so that the
resulting link address is is your address space. This should be
sufficient for barebox. For Linux you have to adjust the device size of
the device which is passed to armlinux_add_dram() to 64MB.

I hope this helps

Sascha

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