From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-gy0-f177.google.com ([209.85.160.177]) by bombadil.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1Okzzi-00081W-8v for barebox@lists.infradead.org; Mon, 16 Aug 2010 13:44:56 +0000 Received: by gyf2 with SMTP id 2so2261639gyf.36 for ; Mon, 16 Aug 2010 06:44:52 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20100816091330.GN27749@pengutronix.de> References: <20100816091330.GN27749@pengutronix.de> Date: Mon, 16 Aug 2010 19:14:52 +0530 Message-ID: From: kuldeep ghan List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============1167770158==" Sender: barebox-bounces@lists.infradead.org Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: Re: changes for reducing DDR size To: Sascha Hauer Cc: barebox@lists.infradead.org --===============1167770158== Content-Type: multipart/alternative; boundary=00151750dc1c796456048df109b5 --00151750dc1c796456048df109b5 Content-Type: text/plain; charset=ISO-8859-1 Hi Sascha, >> You have to adjust the TEXT_BASE in arch/arm/mach-imx/Kconfig so that the resulting link address is is your address space. I have changed the TEXT_BASE to 0xA1F000000. Now it is pointing to 31st MB of 1st chip select. I did not understand what do you mean by " resulting link address is your address space " ? According to TEXT_BASE at 0xA1F000000, i have following stack and malloc area's Malloc space: 0xa1900000 -> 0xa1f00000 (size 6 MB) Stack space : 0xa18f8000 -> 0xa1900000 (size 32 kB) >> For Linux you have to adjust the device size of the device which is passed to armlinux_add_dram() to 64MB. I am adding two device using armlinux_add_dram() each with 32MB size and map_base address of 0xA0000000 and 0xB0000000 respectively.. Is that fine or Can I have one device registered with map_base address of 0xA0000000 and 64MB size?? I have enabled MMU in barebox. There also i have a change for arm_create_section(). Following is section of code i have in pcm038_mmu_init() *static void pcm038_mmu_init(void) { mmu_init(); arm_create_section(0xa0000000, 0xa0000000, 32, PMD_SECT_DEF_CACHED); arm_create_section(0xb0000000, 0xa0000000, 32, PMD_SECT_DEF_UNCACHED); setup_dma_coherent(0x10000000); #if TEXT_BASE & (0x100000 - 1) #warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary #else arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED); #endif mmu_enable(); }* With all these changes, I see ping command hangs.. :( If I replace the macro from PMD_SECT_DEF_UNCACHED to PMD_SECT_DEF_CACHED in the function pcm038_mmu_init(), the ping command throws some transmission timeout messages and exits saying the the destination is not Alive. It would be great if you can help me out!! Thanks, Kuldeep. On Mon, Aug 16, 2010 at 2:43 PM, Sascha Hauer wrote: > > Hi, > > On Fri, Aug 13, 2010 at 08:47:38PM +0530, kuldeep ghan wrote: > > Hi, > > I am using PCM038 based custom board with changes in Memory > > configuration. I want to know what all changes i have to do in barebox > > source if I am reducing the size of DDR to 64 MB. > > I have two 32MB DDR chips interfaced on CSD0 and CSD1. I am able to boot > the > > board with changes in pcm038 and lowlevel_init.S. I see that both the > DDRs > > are initialized properly and able to write and read to DDR address space. > > Ping to command is failing with these changes. And I am not > sure > > about the changes required for stack size and malloc size. > > You have to adjust the TEXT_BASE in arch/arm/mach-imx/Kconfig so that the > resulting link address is is your address space. This should be > sufficient for barebox. For Linux you have to adjust the device size of > the device which is passed to armlinux_add_dram() to 64MB. > > I hope this helps > > Sascha > > > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | > --00151750dc1c796456048df109b5 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi Sascha,
=A0=A0=A0 >> You have to adjust the TEXT_BASE in arch/a= rm/mach-imx/Kconfig so that the
resulting link address is is your address space.=A0=A0=A0=A0

=A0=A0= =A0=A0=A0=A0=A0 I have changed the TEXT_BASE to 0xA1F000000. Now it is poin= ting to 31st MB of 1st chip select. I did not understand what do you mean b= y " resulting link address i= s your address space " ?

According to TEXT_BASE at 0xA1F000000, i have following stack and mallo= c area's

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0 Malloc space: 0xa1900000 -> 0xa1f00000 (size=A0 6 MB)
=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 Stack space : 0xa18f= 8000 -> 0xa1900000 (size 32 kB)

=A0=A0=A0 >> For Linux you have to adjust the device size of=A0 t= he device which is passed to armlinux_add_dram() to 64MB.

=A0I am ad= ding two device using armlinux_add_dram() each with 32MB size and map_base = address of 0xA0000000 and 0xB0000000 respectively.. Is that fine or Can I have one device registered with map= _base address of 0xA0000000 and 64MB size??

I have enabled MMU in barebox. There also i have a change for arm_creat= e_section(). Following is section of code i have in pcm038_mmu_init()
static void pcm038_mmu_init(void)
{
=A0=A0=A0=A0=A0=A0=A0 mmu_in= it();

=A0=A0=A0=A0=A0=A0=A0 arm_create_section(0xa0000000, 0xa0000000, 32, PMD_SE= CT_DEF_CACHED);
=A0=A0=A0=A0=A0=A0=A0 arm_create_section(0xb0000000, 0xa= 0000000, 32, PMD_SECT_DEF_UNCACHED);


=A0=A0=A0=A0=A0=A0=A0 setup= _dma_coherent(0x10000000);

#if TEXT_BASE & (0x100000 - 1)
#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary#else
=A0=A0=A0=A0=A0=A0=A0 arm_create_section(0x0,=A0=A0=A0=A0=A0=A0= =A0 TEXT_BASE,=A0=A0 1, PMD_SECT_DEF_UNCACHED);
#endif
=A0=A0=A0=A0= =A0=A0=A0 mmu_enable();
}

With all these changes, I see ping = command hangs.. :(

=A0=A0 If I replace the macro from PMD_SECT_DEF_UNCACHED to PMD_SECT_DE= F_CACHED in the function pcm038_mmu_init(),=A0 the ping command throws some= transmission timeout messages and exits saying the the destination is not = Alive.

It would be great if you can help me out!!

Thanks,
Kuldeep.
On Mon, Aug 16, 2010 at 2:43 PM, Sascha Ha= uer <s.hauer= @pengutronix.de> wrote:

Hi,

On Fri, Aug 13, 2010 at 08:47:38PM +0530, kuldeep ghan wrote:
> Hi,
> =A0 =A0 =A0 =A0 I am using PCM038 based custom board with changes in M= emory
> configuration. I want to know what all changes i have to do in barebox=
> source if I am reducing the size of DDR to 64 MB.
> I have two 32MB DDR chips interfaced on CSD0 and CSD1. I am able to bo= ot the
> board with changes in pcm038 and lowlevel_init.S. I see that both the = DDRs
> are initialized properly and able to write and read to DDR address spa= ce.
> =A0 =A0 =A0 =A0 =A0Ping to command is failing with these changes. =A0A= nd I am not sure
> about the changes required for stack size and malloc size.

You have to adjust the TEXT_BASE in arch/arm/mach-imx/Kconfig s= o that the
resulting link address is is your address space. This should be
sufficient for barebox. For Linux you have to adjust the device size of
the device which is passed to armlinux_add_dram() to 64MB.

I hope this helps

Sascha


--
Pengutronix e.K. =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 = =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 |
Industrial Linux Solutions =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | http://www.pengutronix.de/ = =A0|
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 =A0 = =A0|
Amtsgericht Hildesheim, HRA 2686 =A0 =A0 =A0 =A0 =A0 | Fax: =A0 +49-5121-20= 6917-5555 |

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