cortex-a9 boot issue

cortex-a9 boot issue

[Barbier, Renaud]

I have added support for a cortex-a9 off the master branch. 

I am seeing an issue to boot to the prompt found in the function hyp_install. The assembly code is as follows:
	mrs	r12, cpsr
	and	r12, r12, #MODE_MASK

	@ Save the initial CPU state
	adr	r0, .L__boot_cpu_mode_offset
	ldr	r1, [r0]
	str	r12, [r0, r1]   ===> I get an exception here because the register r12 is being written to [r0 + r1] which points to the SPI NOR  boot flash.

Commenting out the call to all functions calling hyp_install, barebox does get to the prompt. 

Is there something I could be missing that would put the __boot_cpu_mode variable in a writable area?

Cheers,
Renaud


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Re: cortex-a9 boot issue

[Lucas Stach]

Hi Renaud,

Am Mittwoch, den 01.05.2019, 10:32 +0000 schrieb Barbier, Renaud:
> I have added support for a cortex-a9 off the master branch. 
> 
> I am seeing an issue to boot to the prompt found in the function
> hyp_install. The assembly code is as follows:
> 	mrs	r12, cpsr
> 	and	r12, r12, #MODE_MASK
> 
> 	@ Save the initial CPU state
> 	adr	r0, .L__boot_cpu_mode_offset
> 	ldr	r1, [r0]
> 	str	r12, [r0, r1]   ===> I get an exception here because
> the register r12 is being written to [r0 + r1] which points to the
> SPI NOR  boot flash.
> 
> Commenting out the call to all functions calling hyp_install, barebox
> does get to the prompt. 
> 
> Is there something I could be missing that would put the
> __boot_cpu_mode variable in a writable area?

No, this code was just not written with XIP in mind and I'm currently
no sure how to improve this, given how early this code needs to be
executed.

Regards,
Lucas

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RE: cortex-a9 boot issue

[Barbier, Renaud]

Thanks.
At present, not calling this hyp_install function seems to be ok

Should I have used  a pre-bootloader? 
What is the barebox/ARM way I should have followed? I come from PPC and not familiar yet with the PBL.


> -----Original Message-----
> From: Lucas Stach [mailto:l.stach@pengutronix.de]
> Sent: 02 May 2019 11:22
> To: Barbier, Renaud <renaud.barbier@abaco.com>;
> barebox@lists.infradead.org
> Subject: Re: cortex-a9 boot issue
> 
> 
> 
> [EXTERNAL SOURCE]: This email originated from outside Abaco. DO NOT CLICK
> a link or open an attachment unless you know the content is safe and are
> expecting it from the sender. If in doubt, contact the sender separately to
> verify.
> 
> Hi Renaud,
> 
> Am Mittwoch, den 01.05.2019, 10:32 +0000 schrieb Barbier, Renaud:
> > I have added support for a cortex-a9 off the master branch.
> >
> > I am seeing an issue to boot to the prompt found in the function
> > hyp_install. The assembly code is as follows:
> >       mrs     r12, cpsr
> >       and     r12, r12, #MODE_MASK
> >
> >       @ Save the initial CPU state
> >       adr     r0, .L__boot_cpu_mode_offset
> >       ldr     r1, [r0]
> >       str     r12, [r0, r1]   ===> I get an exception here because
> > the register r12 is being written to [r0 + r1] which points to the
> > SPI NOR  boot flash.
> >
> > Commenting out the call to all functions calling hyp_install, barebox
> > does get to the prompt.
> >
> > Is there something I could be missing that would put the
> > __boot_cpu_mode variable in a writable area?
> 
> No, this code was just not written with XIP in mind and I'm currently
> no sure how to improve this, given how early this code needs to be
> executed.
> 
> Regards,
> Lucas
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