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Thu, 27 Oct 2022 11:35:33 -0700 (PDT) MIME-Version: 1.0 References: <20221010074834.2361014-1-a.fatoum@pengutronix.de> In-Reply-To: <20221010074834.2361014-1-a.fatoum@pengutronix.de> From: Bruno Thomsen Date: Thu, 27 Oct 2022 20:35:17 +0200 Message-ID: To: Ahmad Fatoum Cc: barebox@lists.infradead.org, Johannes Zink , Lars Pedersen , Andrey Smirnov Content-Type: text/plain; charset="UTF-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221027_113538_749983_F76EDBB8 X-CRM114-Status: GOOD ( 21.28 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.4 required=4.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH] ARM: i.MX7: don't hardcode UART1 in imx7_early_setup_uart_clock X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) Hi Ahmad, Den man. 10. okt. 2022 kl. 09.48 skrev Ahmad Fatoum : > > imx7_early_setup_uart_clock() has a very generic sounding name, but so > far only set up clocks for UART1. This can lead board code authors > astray that intend to user a different UART for DEBUG_LL. > > This issue affects board code for kamstrup-mx7-concentrator, meerkat96 > and zii-imx7d-dev, which use UART4, UART6 and UART2 respectively. > > As I don't have this boards available to test and clock changes may have > adverse effect elsewhere, we have all existing users setup UART1 as > before, but note with a comment that this may not be the original > author's intention. > > Signed-off-by: Ahmad Fatoum > --- > I have CC'd authors of the three likely misconfigured boards, > in case they want to fix them and test. > --- > arch/arm/boards/ac-sxb/lowlevel.c | 2 +- > .../boards/freescale-mx7-sabresd/lowlevel.c | 2 +- > .../kamstrup-mx7-concentrator/lowlevel.c | 3 ++- > arch/arm/boards/meerkat96/lowlevel.c | 3 ++- > arch/arm/boards/zii-imx7d-dev/lowlevel.c | 3 ++- > .../arm/mach-imx/include/mach/imx7-ccm-regs.h | 21 +++++++++---------- > 6 files changed, 18 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/boards/ac-sxb/lowlevel.c b/arch/arm/boards/ac-sxb/lowlevel.c > index a910555f9bd7..a26454968304 100644 > --- a/arch/arm/boards/ac-sxb/lowlevel.c > +++ b/arch/arm/boards/ac-sxb/lowlevel.c > @@ -93,7 +93,7 @@ extern char __dtb_z_ac_sxb_start[]; > > static inline void setup_uart(void) > { > - imx7_early_setup_uart_clock(); > + imx7_early_setup_uart_clock(1); > > imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX); > > diff --git a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c > index a8733d62091f..6d393bf2b10e 100644 > --- a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c > +++ b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c > @@ -17,7 +17,7 @@ extern char __dtb_imx7d_sdb_start[]; > > static inline void setup_uart(void) > { > - imx7_early_setup_uart_clock(); > + imx7_early_setup_uart_clock(1); > > imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX); > > diff --git a/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c b/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c > index 4a9eae80d153..511f01757c46 100644 > --- a/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c > +++ b/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c > @@ -17,7 +17,8 @@ extern char __dtb_z_imx7d_flex_concentrator_mfg_start[]; > > static inline void setup_uart(void) > { > - imx7_early_setup_uart_clock(); > + /* FIXME: Below UART4 is muxed, not UART1 */ > + imx7_early_setup_uart_clock(1); > You are right, this should setup UART4 and not UART1. Reviewed-by: Bruno Thomsen > imx7_setup_pad(MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX); > > diff --git a/arch/arm/boards/meerkat96/lowlevel.c b/arch/arm/boards/meerkat96/lowlevel.c > index 1c9baeacfb2a..e65726ef1c27 100644 > --- a/arch/arm/boards/meerkat96/lowlevel.c > +++ b/arch/arm/boards/meerkat96/lowlevel.c > @@ -14,7 +14,8 @@ extern char __dtb_z_imx7d_meerkat96_start[]; > > static void setup_uart(void) > { > - imx7_early_setup_uart_clock(); > + /* FIXME: Below UART6 is muxed, not UART1 */ > + imx7_early_setup_uart_clock(1); > imx7_setup_pad(MX7D_PAD_SD1_WP__UART6_DCE_TX); > imx7_uart_setup_ll(); > putc_ll('>'); > diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c > index 7579a2a8a050..0e316b602436 100644 > --- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c > +++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c > @@ -23,7 +23,8 @@ extern char __dtb_z_imx7d_zii_rmu2_start[]; > > static inline void setup_uart(void) > { > - imx7_early_setup_uart_clock(); > + /* FIXME: Below UART2 is muxed, not UART1 */ > + imx7_early_setup_uart_clock(1); > > imx7_setup_pad(MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX); > > diff --git a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h > index aecf9a26d017..0ef0742bb65d 100644 > --- a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h > +++ b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h > @@ -39,16 +39,15 @@ > #define IMX7_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n) IMX7_CCM_CCGR_SETTINGn(n, 0b10) > #define IMX7_CCM_CCGR_SETTINGn_NEEDED(n) IMX7_CCM_CCGR_SETTINGn(n, 0b11) > > -static inline void imx7_early_setup_uart_clock(void) > -{ > - void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR); > - > - writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0), > - ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART1)); > - writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART1_CLK_ROOT__OSC_24M, > - ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART1_CLK_ROOT)); > - writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0), > - ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART1)); > -} > +/* UART counting starts for 1, like in the datasheet/dt-bindings */ > +#define imx7_early_setup_uart_clock(uart) do { \ > + void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR); \ > + writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0), \ > + ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART ## uart)); \ > + writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART ## uart ## _CLK_ROOT__OSC_24M, \ > + ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART ## uart ## _CLK_ROOT)); \ > + writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0), \ > + ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART ## uart)); \ > +} while (0) > > #endif > -- > 2.30.2 >