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Thu, 17 Jun 2021 17:03:11 -0700 (PDT) MIME-Version: 1.0 References: <20210617092303.241349-1-r.czerwinski@pengutronix.de> In-Reply-To: <20210617092303.241349-1-r.czerwinski@pengutronix.de> From: Trent Piepho Date: Thu, 17 Jun 2021 17:03:00 -0700 Message-ID: To: Rouven Czerwinski Cc: Barebox List X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210617_170321_447387_36F5B52D X-CRM114-Status: GOOD ( 15.38 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:e::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.9 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH v2] ARM: imx: add support for TQMa6UL SoM on MBa6ulxl X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) On Thu, Jun 17, 2021 at 2:25 AM Rouven Czerwinski wrote: > + > +static void setup_uart(void) > +{ > + void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR; > + > + imx6_ungate_all_peripherals(); > + > + imx_setup_pad(iomuxbase, MX6_PAD_UART1_TX_DATA__UART1_DCE_TX); > + imx_setup_pad(iomuxbase, MX6_PAD_UART1_RX_DATA__UART1_DCE_RX); >>From what I can tell, imx_setup_pad() will program the conf register with 0. Not a more typical value like 0x1b0b1 that is in most dts files. Does this actually work? It seems like one needs to OR in the pad conf value to the pinmux config constant to actually program this correctly. > + imx6_uart_setup((void *)MX6_UART1_BASE_ADDR); > + pbl_set_putc(imx_uart_putc, (void *)MX6_UART1_BASE_ADDR); > + > + pr_debug("\n"); Do you actually get the output from this? I'm trying to add a new imx6ul board and it seems like one needs a delay between the uart setup and the uart actually working to output data. Or perhaps this is just my board. > +static void noinline start_mba6ulx(void) > +{ > + setup_uart(); Why setup uart when LL_DEBUG is not enabled? This dts should have this working without any extra setup. > + > + imx6ul_barebox_entry(__dtb_z_imx6ul_mba6ulx_start); > +} > + > +ENTRY_FUNCTION(start_imx6ul_mba6ulx, r0, r1, r2) > +{ > + > + imx6ul_cpu_lowlevel_init(); > + > + arm_setup_stack(0x00910000); > + > + if (IS_ENABLED(CONFIG_DEBUG_LL)) { > + imx6_uart_setup_ll(); Don't you need the muxing and other code in setup_uart() for this to work? > + putc_ll('>'); > + } > + > + relocate_to_current_adr(); > + setup_c(); > + barrier(); > + > + start_mba6ulx(); _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox