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From: Trent Piepho <trent.piepho@igorinstitute.com>
To: Barebox List <barebox@lists.infradead.org>
Subject: Re: [PATCH 5/9] ARM: i.MX8MM: correct unrecognized fracpll frequency
Date: Wed, 8 Sep 2021 12:00:37 -0700	[thread overview]
Message-ID: <CAMHeXxOmYuM9+ucqiXEzSSJ7z_0xgRLSE4BYG7GVNCFT0PR3xg@mail.gmail.com> (raw)
In-Reply-To: <CAMHeXxPV_5mzAH3gbpy4WrL16kSstkLhJvx-VUQqbmy9C1r6WQ@mail.gmail.com>

On Sun, Sep 5, 2021 at 6:52 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
>
> Correct the value in imx8mm_fracpll_tbl to match the one expanded by
> MHZ(266) macro, rounding it down to MHz range only.

It's not really "correcting" the value, since the value is wrong.

24 MHz / 9 * 400 / 2^2 = 266666666.6 Hz

Maybe it would be better to say, "make the value in imx8mm_facpll_tbl
incorrect so it matches another incorrect value used elsewhere."

In which case, one has to wonder why it would not be better to use the
correct value everywhere?

>
> Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
> [afa: ported from U-Boot 6ac4d4480663]
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  drivers/ddr/imx8m/ddrphy_utils.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/ddr/imx8m/ddrphy_utils.c b/drivers/ddr/imx8m/ddrphy_utils.c
> index 9a4e1a22ee5e..6836e7d4b351 100644
> --- a/drivers/ddr/imx8m/ddrphy_utils.c
> +++ b/drivers/ddr/imx8m/ddrphy_utils.c
> @@ -198,7 +198,7 @@ static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {
>         { .rate = 600000000U,  .r1 = MDIV(300) | PDIV(3) | SDIV(2), .r2 = 0 },
>         { .rate = 594000000U,  .r1 = MDIV( 99) | PDIV(1) | SDIV(2), .r2 = 0 },
>         { .rate = 400000000U,  .r1 = MDIV(300) | PDIV(9) | SDIV(1), .r2 = 0 },
> -       { .rate = 266666667U,  .r1 = MDIV(400) | PDIV(9) | SDIV(2), .r2 = 0 },
> +       { .rate = 266000000U,  .r1 = MDIV(400) | PDIV(9) | SDIV(2), .r2 = 0 },
>         { .rate = 167000000U,  .r1 = MDIV(334) | PDIV(3) | SDIV(4), .r2 = 0 },
>         { .rate = 100000000U,  .r1 = MDIV(300) | PDIV(9) | SDIV(3), .r2 = 0 },
>  };

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  parent reply	other threads:[~2021-09-08 19:02 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-05 13:51 [PATCH 0/9] ARM: i.MX8M: add nano support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 1/9] ARM: i.MX: add i.MX8MN (Nano) SoC support boilerplate Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 2/9] clk: imx: add i.MX8MN (Nano) support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 3/9] ARM: i.MX8MN: adapt early clock support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 4/9] ARM: i.MX: extend drivers for i.MX8MN (Nano) support Ahmad Fatoum
     [not found]   ` <CAMHeXxN_P3pVSAStL2Z=8La_ioGHNu2hw9qQyFYAJ1VNA8hiEQ@mail.gmail.com>
2021-09-08 19:01     ` Trent Piepho
2021-09-15 10:36       ` Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 5/9] ARM: i.MX8MM: correct unrecognized fracpll frequency Ahmad Fatoum
     [not found]   ` <CAMHeXxPV_5mzAH3gbpy4WrL16kSstkLhJvx-VUQqbmy9C1r6WQ@mail.gmail.com>
2021-09-08 19:00     ` Trent Piepho [this message]
2021-09-15 10:39       ` Ahmad Fatoum
2021-09-24  3:12         ` Trent Piepho
2021-09-05 13:51 ` [PATCH 6/9] ddr: imx8m: add i.MX8MN (Nano) support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 7/9] ddr: imx8m: ddrphy_train: add DDR4 support Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 8/9] scripts: imx: add i.MX8MN support to imx-image Ahmad Fatoum
2021-09-05 13:51 ` [PATCH 9/9] ARM: i.MX8MN: add i.MX8MN-EVK support Ahmad Fatoum

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