Hi<br><br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="im">&gt; What&#39;s going on here? I&#39;ll investigate this further, because in real life I<br>


&gt; have massive SD card write speed issues on my mx25 device on any kernel<br>
&gt; tested from 2.6.37 to 3.3.4 so far.<br>
<br>
</div>I try to keep the iomux descriptions in sync with the kernel. So when<br>
there is a bug in the kernel it&#39;s likely present in barebox aswell.<br>
Another thing which you might want to investigate is the clock<br>
frequency. Please check with an oscilloscope if we really have 25MHz as<br>
suggested above.<br>
<div class="HOEnZb"><div class="h5"><br></div></div></blockquote><div><br></div><div>I used exactly the same iomux descriptions, but we have the same issue in the kernel with huge timeouts. One of the reasons I try to switch to barebox is its simplicity of the driver ideology close to the kernel. Also, what are the default pin mux settings for the ESDHC on mx25, if I comment the following?</div>

<div><br></div><div><div>        /*</div><div>        MX25_PAD_SD1_CMD__SD1_CMD,</div><div>        MX25_PAD_SD1_CLK__SD1_CLK,</div><div>        MX25_PAD_SD1_DATA0__SD1_DATA0,</div><div>        MX25_PAD_SD1_DATA1__SD1_DATA1,</div>

<div>        MX25_PAD_SD1_DATA2__SD1_DATA2,</div><div>        MX25_PAD_SD1_DATA3__SD1_DATA3,</div><div>        */</div></div><div><br></div><div>I thought it might just fallback to the same pin mux but without the 47k pullup (NO_PAD_CTRL). This does not seem to be the case, because I have replaced the definition of the iomux definitions with NO_PAD_CTRL and the problem remains. Only commenting them out seems to have an effect. So, something is either really wrong with my hardware or there has to be another influence.</div>

<div><br></div><div>The oscilloscope shows 190kHz when it fails, 33.33MHz when it works .... interesting. Barebox initializes mpll to 532Mhz and consequently sets sdhc1 to 66.5Mzh. Invoking &#39;cpufreq 399&#39; resets the clocks, however does not adjust the sdhc1 one as on the oscilloscope it stays on 33.33Mhz.</div>

<div><br></div><div>What next?</div><div><br></div><div>Cheers</div><div>Roberto</div></div>