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From: Roberto Nibali <rnibali@gmail.com>
Date: Fri, 25 May 2012 11:19:38 +0200
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Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org
Subject: Re: Booting mx25 based device from SD and NOR
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org

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Hi

On Thu, May 24, 2012 at 7:17 PM, Sascha Hauer <s.hauer@pengutronix.de>wrote=
:

> On Thu, May 24, 2012 at 03:18:13PM +0200, Roberto Nibali wrote:
> > Hi Eric
> >
> > On Thu, May 24, 2012 at 2:58 PM, Eric B=E9nard <eric@eukrea.com> wrote:
> >
> >
> >
> > I support WEIM configuration is done in the low level part, isn't it?
>
> You don't need to do it in lowlevel init, just before registering the
> cfi device is enough. Usually it's good habit to do only the absolutely
> necessary things in lowlevel init. Doing things later increases the
> chance that you get useful debug output when something goes wrong
>
> I read the different board initialization routines over and over again,
but can't find a common pattern. From what I see the lowlevel_init (which
has been converted nicely into a C file), only AIPS, MAX, MPLL core clock,
all clocks, SDRAM are initialized, but I have seen AIPS and MAX setups in
core_init functions (eukrea_cpuimx35.c), as well as clock setups in
console_init and other places. So, what's the bare minimum in lowlevel to
set up? SDRAM/MDDR? What's the order of things?

I am merely asking because I have come a long way trying to debug an issue
with weird I/O and clock behaviour on the ESDHC and other parts of my mx25
device.

Thanks and best regards
Roberto

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Hi<br><br><div class=3D"gmail_quote">On Thu, May 24, 2012 at 7:17 PM, Sasch=
a Hauer <span dir=3D"ltr">&lt;<a href=3D"mailto:s.hauer@pengutronix.de" tar=
get=3D"_blank">s.hauer@pengutronix.de</a>&gt;</span> wrote:<br><blockquote =
class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc solid=
;padding-left:1ex">

<div class=3D"im">On Thu, May 24, 2012 at 03:18:13PM +0200, Roberto Nibali =
wrote:<br>
&gt; Hi Eric<br>
&gt;<br>
&gt; On Thu, May 24, 2012 at 2:58 PM, Eric B=E9nard &lt;<a href=3D"mailto:e=
ric@eukrea.com">eric@eukrea.com</a>&gt; wrote:<br>
&gt;<br>
&gt;<br>
&gt;<br>
</div><div class=3D"im">&gt; I support WEIM configuration is done in the lo=
w level part, isn&#39;t it?<br>
<br>
</div>You don&#39;t need to do it in lowlevel init, just before registering=
 the<br>
cfi device is enough. Usually it&#39;s good habit to do only the absolutely=
<br>
necessary things in lowlevel init. Doing things later increases the<br>
chance that you get useful debug output when something goes wrong<br>
<div class=3D"HOEnZb"><div class=3D"h5"><br></div></div></blockquote><div>I=
 read the different board initialization routines over and over again, but =
can&#39;t find a common pattern. From what I see the lowlevel_init (which h=
as been converted nicely into a C file), only AIPS, MAX, MPLL core clock, a=
ll clocks, SDRAM are initialized, but I have seen AIPS and MAX setups in co=
re_init functions (eukrea_cpuimx35.c), as well as clock setups in console_i=
nit and other places. So, what&#39;s the bare minimum in lowlevel to set up=
? SDRAM/MDDR? What&#39;s the order of things?=A0</div>

<div><br></div><div>I am merely asking because I have come a long way tryin=
g to debug an issue with weird I/O and clock behaviour on the ESDHC and oth=
er parts of my mx25 device.</div><div><br></div><div>Thanks and best regard=
s</div>

<div>Roberto</div></div>

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