* GPIO setting [not found] <CF4C8000.DD58%ivor@veriline.co.za> @ 2014-03-17 8:47 ` Ivor Kruger 2014-03-17 12:09 ` Sascha Hauer 0 siblings, 1 reply; 6+ messages in thread From: Ivor Kruger @ 2014-03-17 8:47 UTC (permalink / raw) To: barebox Hi, sure this is a quick and easy question for the groupŠ On the OMAP4430, using the command from within barebox prompt to configure a GPIO for testing hardware: gpio_direction_output 140 0 Should this be sufficient to set the gpio pin low, or is it required to still do some pin muxing as well? Thanks Ivor _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: GPIO setting 2014-03-17 8:47 ` GPIO setting Ivor Kruger @ 2014-03-17 12:09 ` Sascha Hauer 2014-03-17 13:43 ` Ivor Kruger 2014-03-18 9:21 ` Ivor Kruger 0 siblings, 2 replies; 6+ messages in thread From: Sascha Hauer @ 2014-03-17 12:09 UTC (permalink / raw) To: Ivor Kruger; +Cc: barebox On Mon, Mar 17, 2014 at 10:47:06AM +0200, Ivor Kruger wrote: > Hi, sure this is a quick and easy question for the groupŠ > > On the OMAP4430, using the command from within barebox prompt to configure > a GPIO for testing hardware: > > gpio_direction_output 140 0 > > Should this be sufficient to set the gpio pin low, or is it required to > still do some pin muxing as well? The gpio functions only configure the gpio controller. If this pin is not gpio by default, you have to configure the pinmux controller aswell. There is no way to do that on the barebox commandline other than direct register writes to the pinmux controller. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: GPIO setting 2014-03-17 12:09 ` Sascha Hauer @ 2014-03-17 13:43 ` Ivor Kruger 2014-03-18 16:18 ` Sascha Hauer 2014-03-18 9:21 ` Ivor Kruger 1 sibling, 1 reply; 6+ messages in thread From: Ivor Kruger @ 2014-03-17 13:43 UTC (permalink / raw) To: barebox Thanks for the reply. So I take it I need to edit the mux.c file in the PCM049(which is the one I use) board directory. I changed the lines as below: {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ {MCSPI1_CLK, (M3)}, /* gpio134 */ {MCSPI1_SOMI, (M3)}, /* gpio135 */ {MCSPI1_SIMO, (M3)}, /* gpio136 */ {MCSPI1_CS0, (M3)}, /* gpio137 */ {MCSPI1_CS1, (M3)}, /* gpio138 */ {MCSPI1_CS2, (M3)}, /* gpio139 */ {MCSPI1_CS3, (M3)}, /* gpio140 */ {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ This still did not allow me to change pin conditions. So in the board.c file for the PCM049, I also added these lines to force the config of the pins: omap_add_display(&pcm049_fb_data); gpio_direction_output(135, 1); gpio_direction_output(136, 1); gpio_direction_output(137, 1); gpio_direction_output(138, 1); gpio_direction_output(139, 1); gpio_direction_output(140, 1); If I then do the gpiolib command inbarebox, the pins are indicated as gpio as below: gpio 133: false gpio 134: false gpio 135: true gpio gpio 136: true gpio gpio 137: true gpio gpio 138: true gpio gpio 139: true gpio gpio 140: true gpio gpio 141: false gpio 142: false gpio 143: false BUT using the commands: gpio_direction_output 135 0 And gpio_direction_output 135 1 Still does not change the pin condition. Is there something else I still need to do? Thanks Ivor On 2014/03/17, 2:09 PM, "Sascha Hauer" <s.hauer@pengutronix.de> wrote: >On Mon, Mar 17, 2014 at 10:47:06AM +0200, Ivor Kruger wrote: >> Hi, sure this is a quick and easy question for the group? >> >> On the OMAP4430, using the command from within barebox prompt to >>configure >> a GPIO for testing hardware: >> >> gpio_direction_output 140 0 >> >> Should this be sufficient to set the gpio pin low, or is it required to >> still do some pin muxing as well? > >The gpio functions only configure the gpio controller. If this pin is >not gpio by default, you have to configure the pinmux controller aswell. >There is no way to do that on the barebox commandline other than direct >register >writes to the pinmux controller. > >Sascha > >-- >Pengutronix e.K. | | >Industrial Linux Solutions | http://www.pengutronix.de/ | >Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | >Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: GPIO setting 2014-03-17 13:43 ` Ivor Kruger @ 2014-03-18 16:18 ` Sascha Hauer 0 siblings, 0 replies; 6+ messages in thread From: Sascha Hauer @ 2014-03-18 16:18 UTC (permalink / raw) To: Ivor Kruger; +Cc: barebox On Mon, Mar 17, 2014 at 03:43:36PM +0200, Ivor Kruger wrote: > Thanks for the reply. So I take it I need to edit the mux.c file in the > PCM049(which is the one I use) board directory. I changed the lines as > below: > > {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ > {MCSPI1_CLK, (M3)}, /* gpio134 */ > {MCSPI1_SOMI, (M3)}, /* gpio135 */ > {MCSPI1_SIMO, (M3)}, /* gpio136 */ > {MCSPI1_CS0, (M3)}, /* gpio137 */ > {MCSPI1_CS1, (M3)}, /* gpio138 */ > {MCSPI1_CS2, (M3)}, /* gpio139 */ > {MCSPI1_CS3, (M3)}, /* gpio140 */ > {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ > > This still did not allow me to change pin conditions. So in the board.c > file for the PCM049, I also added these lines to force the config of the > pins: > > omap_add_display(&pcm049_fb_data); > gpio_direction_output(135, 1); > gpio_direction_output(136, 1); > gpio_direction_output(137, 1); > gpio_direction_output(138, 1); > gpio_direction_output(139, 1); > gpio_direction_output(140, 1); > > > If I then do the gpiolib command inbarebox, the pins are indicated as gpio > as below: > > gpio 133: false > gpio 134: false > gpio 135: true gpio > gpio 136: true gpio > gpio 137: true gpio > gpio 138: true gpio > gpio 139: true gpio > gpio 140: true gpio > gpio 141: false > gpio 142: false > gpio 143: false > > BUT using the commands: > > gpio_direction_output 135 0 > > And > > gpio_direction_output 135 1 > > Still does not change the pin condition. > > Is there something else I still need to do? Generally that's all you have to do: Configure pinmux and use gpio functions. I'm not very familiar with OMAPs. How does the translation from MCSPI1_SOMI to gpio135 work? Are you sure the gpio number is correct? Is gpio generally M3 and what do the other flags lie IEN and PTU do? I have no idea what goes wrong here, but that would be the next places I would look at. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: GPIO setting 2014-03-17 12:09 ` Sascha Hauer 2014-03-17 13:43 ` Ivor Kruger @ 2014-03-18 9:21 ` Ivor Kruger 2014-03-18 9:40 ` Ivor Kruger 1 sibling, 1 reply; 6+ messages in thread From: Ivor Kruger @ 2014-03-18 9:21 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox Hi, I am still having a problem with the GPIO. When I check the mux registers for the GPIO pins I want to use, i get: barebox@Phytec phyCORE pcm049:/ md 0x4a100130 4a100130: 00070118 00070007 00070007 00070007 ................ 4a100140: 00000118 00000100 01180118 01180118 ................ This indicates that the pins are still in safe mode despite the settings of below in the mux.c file. {MCSPI1_CLK, (M3)}, /* gpio134 */ {MCSPI1_SOMI, (M3)}, /* gpio135 */ {MCSPI1_SIMO, (M3)}, /* gpio136 */ {MCSPI1_CS0, (M3)}, /* gpio137 */ {MCSPI1_CS1, (M3)}, /* gpio138 */ {MCSPI1_CS2, (M3)}, /* gpio139 */ {MCSPI1_CS3, (M3)}, /* gpio140 */ In the board file I have the following code: static int pcm049_devices_init(void) { i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); omap44xx_add_i2c1(NULL); omap44xx_add_mmc1(NULL); gpmc_generic_init(0x10); pcm049_network_init(); omap_add_gpmc_nand_device(&nand_plat); #ifdef CONFIG_PARTITION devfs_add_partition("nand0", 0x00000, SZ_128K, DEVFS_PARTITION_FIXED, "xload_raw"); dev_add_bb_dev("xload_raw", "xload"); devfs_add_partition("nand0", SZ_128K, SZ_512K, DEVFS_PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K, DEVFS_PARTITION_FIXED, "env_raw"); dev_add_bb_dev("env_raw", "env0"); #endif armlinux_set_bootparams((void *)0x80000100); armlinux_set_architecture(MACH_TYPE_PCM049); omap_add_display(&pcm049_fb_data); gpio_direction_output(134, 1); gpio_direction_output(135, 1); gpio_direction_output(136, 1); gpio_direction_output(137, 1); gpio_direction_output(138, 0); gpio_direction_output(139, 0); gpio_direction_output(140, 0); return 0; } If I do a mw 0x4a10013c 0x00030003 the register is changed as expected. I can then use the gpio_direction_output command to toggle the pin. So the problem clearly lies within the way the mux registers are configured. Any ideas on what I am doing wrong Vielen dank Ivor On 2014/03/17, 2:09 PM, "Sascha Hauer" <s.hauer@pengutronix.de> wrote: >On Mon, Mar 17, 2014 at 10:47:06AM +0200, Ivor Kruger wrote: >> Hi, sure this is a quick and easy question for the group? >> >> On the OMAP4430, using the command from within barebox prompt to >>configure >> a GPIO for testing hardware: >> >> gpio_direction_output 140 0 >> >> Should this be sufficient to set the gpio pin low, or is it required to >> still do some pin muxing as well? > >The gpio functions only configure the gpio controller. If this pin is >not gpio by default, you have to configure the pinmux controller aswell. >There is no way to do that on the barebox commandline other than direct >register >writes to the pinmux controller. > >Sascha > >-- >Pengutronix e.K. | | >Industrial Linux Solutions | http://www.pengutronix.de/ | >Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | >Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: GPIO setting 2014-03-18 9:21 ` Ivor Kruger @ 2014-03-18 9:40 ` Ivor Kruger 0 siblings, 0 replies; 6+ messages in thread From: Ivor Kruger @ 2014-03-18 9:40 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox Hi, actually, I found my problem. You know how they say that assumptions are the mother of all screw ups… Well I assumed that the function set_muxconf_regs() was called in the init function…upon checking I found that it was not, thus the mux was just set to the default values and no amount of editing in the settings made a difference. So I added it to be the first line in the "static int pcm049_devices_init(void)” function. Now the mux gets configured correctly. Regards Ivor On 2014/03/18, 11:21 AM, "Ivor Kruger" <ivor@veriline.co.za> wrote: >Hi, I am still having a problem with the GPIO. > >When I check the mux registers for the GPIO pins I want to use, i get: > >barebox@Phytec phyCORE pcm049:/ md 0x4a100130 >4a100130: 00070118 00070007 00070007 00070007 >................ >4a100140: 00000118 00000100 01180118 01180118 >................ > >This indicates that the pins are still in safe mode despite the settings >of below in the mux.c file. > >{MCSPI1_CLK, (M3)}, /* gpio134 */ > {MCSPI1_SOMI, (M3)}, /* gpio135 */ > {MCSPI1_SIMO, (M3)}, /* gpio136 */ > {MCSPI1_CS0, (M3)}, /* gpio137 */ > {MCSPI1_CS1, (M3)}, /* gpio138 */ > {MCSPI1_CS2, (M3)}, /* gpio139 */ > {MCSPI1_CS3, (M3)}, /* gpio140 */ > >In the board file I have the following code: > >static int pcm049_devices_init(void) >{ > i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); > omap44xx_add_i2c1(NULL); > omap44xx_add_mmc1(NULL); > > gpmc_generic_init(0x10); > > pcm049_network_init(); > > omap_add_gpmc_nand_device(&nand_plat); > >#ifdef CONFIG_PARTITION > devfs_add_partition("nand0", 0x00000, SZ_128K, DEVFS_PARTITION_FIXED, >"xload_raw"); > dev_add_bb_dev("xload_raw", "xload"); > devfs_add_partition("nand0", SZ_128K, SZ_512K, DEVFS_PARTITION_FIXED, >"self_raw"); > dev_add_bb_dev("self_raw", "self0"); > devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K, >DEVFS_PARTITION_FIXED, "env_raw"); > dev_add_bb_dev("env_raw", "env0"); >#endif > > armlinux_set_bootparams((void *)0x80000100); > armlinux_set_architecture(MACH_TYPE_PCM049); > > omap_add_display(&pcm049_fb_data); > > gpio_direction_output(134, 1); > gpio_direction_output(135, 1); > gpio_direction_output(136, 1); > gpio_direction_output(137, 1); > gpio_direction_output(138, 0); > gpio_direction_output(139, 0); > gpio_direction_output(140, 0); > > return 0; >} > >If I do a mw 0x4a10013c 0x00030003 the register is changed as expected. I >can then use the gpio_direction_output command to toggle the pin. > > >So the problem clearly lies within the way the mux registers are >configured. > >Any ideas on what I am doing wrong > >Vielen dank >Ivor > > > > > >On 2014/03/17, 2:09 PM, "Sascha Hauer" <s.hauer@pengutronix.de> wrote: > >>On Mon, Mar 17, 2014 at 10:47:06AM +0200, Ivor Kruger wrote: >>> Hi, sure this is a quick and easy question for the group? >>> >>> On the OMAP4430, using the command from within barebox prompt to >>>configure >>> a GPIO for testing hardware: >>> >>> gpio_direction_output 140 0 >>> >>> Should this be sufficient to set the gpio pin low, or is it required to >>> still do some pin muxing as well? >> >>The gpio functions only configure the gpio controller. If this pin is >>not gpio by default, you have to configure the pinmux controller aswell. >>There is no way to do that on the barebox commandline other than direct >>register >>writes to the pinmux controller. >> >>Sascha >> >>-- >>Pengutronix e.K. | >>| >>Industrial Linux Solutions | http://www.pengutronix.de/ >>| >>Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 >>| >>Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 >>| _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-03-18 16:19 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <CF4C8000.DD58%ivor@veriline.co.za>
2014-03-17 8:47 ` GPIO setting Ivor Kruger
2014-03-17 12:09 ` Sascha Hauer
2014-03-17 13:43 ` Ivor Kruger
2014-03-18 16:18 ` Sascha Hauer
2014-03-18 9:21 ` Ivor Kruger
2014-03-18 9:40 ` Ivor Kruger
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox