AW: Porting Cora Z7 Board to barebox

[Michael Graichen <michael.graichen@hotmail.com>]

> > 
> > In lowlevel.c I am setting the clock divider for the sdio0 interface to 10
> > and the Source for generated clock is IO PLL. Therefore, the sdio IP
> > should get a 100 MHz input clock. IS this correct? Do you know which
> > clockrate the driver expects? 
> > 
> > Or do you have any other idea what could case the error?
> 
> Ok, I found out that maybe 100 MHz is a little bit to slow for this SD
> Card IP. When setting the clock to 200 MHz or 250 MHz, the mmc0 gets
> detected all the time by barebox.
> 



This only works for me on my soldert eMMC card (MTFC8GAKAJCN). 
>From my measurements back in 2020 i remember that the amplitude of the clock signal will shrink with higher frequencies on Zynq-7000. 
Therefore I reduced the Clock to 25MHz on purpose, or some micro SD cards connected to the other sdhci interface do not work.

I do not have a solution for this, but an eval hack ;-)

@@ -985,10 +985,13 @@ static int sd_change_freq(struct mci *mci)
 	if (mci->scr[0] & SD_DATA_STAT_AFTER_ERASE)
 		mci->erased_byte = 0xFF;
 	else
 		mci->erased_byte = 0x0;
 
+	/* Bug do not change freqency for SD cords */
+	return 0;
+
 	/* Version 1.0 doesn't support switching */
 	if (mci->version == SD_VERSION_1_0)
 		return 0;
 
 	timeout = 4;
@@ -1499,14 +1502,22 @@ static int mci_mmc_try_bus_width(struct mci *mci, enum mci_bus_width bus_width,
 static int mci_mmc_select_bus_width(struct mci *mci)
 {
 	struct mci_host *host = mci->host;
 	int ret;
 	int idx = 0;
+
+#ifdef CONFIG_ARCH_ZYNQ
+	/* On zynq-7000 mmc and sdcard are connected via 4-line bus anyway */
+	static enum mci_bus_width bus_widths[] = {
+		MMC_BUS_WIDTH_4,
+	};
+#else
 	static enum mci_bus_width bus_widths[] = {
 		MMC_BUS_WIDTH_4,
 		MMC_BUS_WIDTH_8,
 	};
+#endif
 
 	if (!(host->host_caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)))
 		return MMC_BUS_WIDTH_1;
 
 	/*