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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 18/30] mci: imx-esdhc: add support for delay/tuning properties in DT
Date: Tue, 6 May 2025 08:37:06 +0200	[thread overview]
Message-ID: <aBmuEkJMRx69PGJT@pengutronix.de> (raw)
In-Reply-To: <20250505120633.3717186-19-a.fatoum@pengutronix.de>

On Mon, May 05, 2025 at 02:06:21PM +0200, Ahmad Fatoum wrote:
> With higher data rates, we will need to fine tune delay settings, which
> can be supplied via the device tree. Add support for the binding to
> barebox.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  drivers/mci/imx-esdhc.c | 70 ++++++++++++++++++++++++++++++++++++++++-
>  drivers/mci/imx-esdhc.h | 14 +++++++++
>  2 files changed, 83 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
> index 86dc6daba845..9d82c886cdcf 100644
> --- a/drivers/mci/imx-esdhc.c
> +++ b/drivers/mci/imx-esdhc.c
> @@ -145,6 +145,15 @@ static void usdhc_set_timing(struct fsl_esdhc_host *host, enum mci_timing timing
>  	case MMC_TIMING_MMC_DDR52:
>  		mixctrl |= MIX_CTRL_DDREN;
>  		sdhci_write32(&host->sdhci, IMX_SDHCI_MIXCTRL, mixctrl);
> +		if (host->boarddata.delay_line) {
> +			u32 v;
> +			v = host->boarddata.delay_line <<
> +				IMX_SDHCI_DLL_CTRL_OVERRIDE_VAL_SHIFT |
> +				(1 << IMX_SDHCI_DLL_CTRL_OVERRIDE_EN_SHIFT);
> +			if (cpu_is_mx53())
> +				v <<= 1;
> +			sdhci_write32(&host->sdhci, IMX_SDHCI_DLL_CTRL, v);
> +		}
>  		break;
>  	default:
>  		sdhci_write32(&host->sdhci, IMX_SDHCI_MIXCTRL, mixctrl);
> @@ -290,7 +299,49 @@ static int esdhc_init(struct mci_host *mci, struct device *dev)
>  	esdhc_clrsetbits32(host, SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET,
>  			SYSCTL_TIMEOUT_MASK, 14 << 16);
>  
> -	return ret;
> +	if (IS_ENABLED(CONFIG_MCI_TUNING) && esdhc_is_usdhc(host) &&
> +	    (host->socdata->flags & ESDHC_FLAG_STD_TUNING)) {
> +		u32 tmp;
> +
> +		/* disable DLL_CTRL delay line settings */
> +		sdhci_write32(&host->sdhci, ESDHC_DLL_CTRL, 0x0);
> +
> +		tmp = sdhci_read32(&host->sdhci, ESDHC_TUNING_CTRL);
> +		tmp |= ESDHC_STD_TUNING_EN;
> +
> +		/*
> +		 * ROM code or bootloader may config the start tap
> +		 * and step, unmask them first.
> +		 */

This comment is rather pointless. It's just good style to mask out
the current values before setting them.

> +		tmp &= ~(ESDHC_TUNING_START_TAP_MASK | ESDHC_TUNING_STEP_MASK);
> +		if (host->boarddata.tuning_start_tap)
> +			tmp |= host->boarddata.tuning_start_tap;
> +		else
> +			tmp |= ESDHC_TUNING_START_TAP_DEFAULT;

You could initialize boarddata.tuning_start_tap with ESDHC_TUNING_START_TAP_DEFAULT
in fsl_esdhc_probe_dt().

> +
> +		if (host->boarddata.tuning_step) {

Same here.

Sascha

> +			tmp |= host->boarddata.tuning_step
> +				<< ESDHC_TUNING_STEP_SHIFT;
> +		} else {
> +			tmp |= ESDHC_TUNING_STEP_DEFAULT
> +				<< ESDHC_TUNING_STEP_SHIFT;
> +		}
> +
> +		/* Disable the CMD CRC check for tuning, if not, need to
> +		 * add some delay after every tuning command, because
> +		 * hardware standard tuning logic will directly go to next
> +		 * step once it detect the CMD CRC error, will not wait for
> +		 * the card side to finally send out the tuning data, trigger
> +		 * the buffer read ready interrupt immediately. If usdhc send
> +		 * the next tuning command some eMMC card will stuck, can't
> +		 * response, block the tuning procedure or the first command
> +		 * after the whole tuning procedure always can't get any response.
> +		 */
> +		tmp |= ESDHC_TUNING_CMD_CRC_CHECK_DISABLE;
> +		sdhci_write32(&host->sdhci, ESDHC_TUNING_CTRL, tmp);
> +	}
> +
> +	return 0;
>  }
>  
>  static const struct mci_ops fsl_esdhc_ops = {
> @@ -300,6 +351,21 @@ static const struct mci_ops fsl_esdhc_ops = {
>  	.card_present = esdhc_card_present,
>  };
>  
> +static void fsl_esdhc_probe_dt(struct device *dev, struct fsl_esdhc_host *host)
> +{
> +	struct device_node *np = dev->of_node;
> +	struct esdhc_platform_data *boarddata = &host->boarddata;
> +
> +	if (!IS_ENABLED(CONFIG_MCI_TUNING))
> +		return;
> +
> +	of_property_read_u32(np, "fsl,tuning-step", &boarddata->tuning_step);
> +	of_property_read_u32(np, "fsl,tuning-start-tap",
> +			     &boarddata->tuning_start_tap);
> +	if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
> +		boarddata->delay_line = 0;
> +}
> +

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |



  reply	other threads:[~2025-05-06  6:38 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-05 12:06 [PATCH 00/30] mci: imx-esdhc: add HS200 support Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 01/30] mci: sdhci: fix SDHCI_TRNS_AUTO_CMD12 definition Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 02/30] mci: move most recent I/O settings into mci_host::ios Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 03/30] mci: use struct mci_host::ios inside mci_set_ios Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 04/30] mci: tuning: fix fallback to DDR52 Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 05/30] mci: sdhci: unmap DMA buffers on timeout Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 06/30] mci: add MMC_CAP_UHS constants Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 07/30] mci: rename MMC_CAP_MMC_x_yV_DDR to MMC_CAP_x_yV_DDR as in Linux Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 08/30] mci: compare host and card caps for supported speeds Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 09/30] mci: print HS200 capabilities in devinfo Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 10/30] mci: respect no-1-8-v OF property Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 11/30] mci: sdhci: add support for struct mci_data::timeout_ns Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 12/30] mci: imx-esdhc: use unsigned types where appropriate Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 13/30] mci: imx-esdhc: implement esdhc_poll using sdhci_read32_poll_timeout Ahmad Fatoum
2025-05-06  6:25   ` Sascha Hauer
2025-05-05 12:06 ` [PATCH 14/30] mci: imx-esdhc: drop one extra read of SDHCI_INT_STATUS Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 15/30] mci: sdhci: add cmd parameter to sdhci_transfer_* Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 16/30] mci: arasan: introduce mmc_op_tuning helper Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 17/30] mci: imx-esdhc: flesh out register description Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 18/30] mci: imx-esdhc: add support for delay/tuning properties in DT Ahmad Fatoum
2025-05-06  6:37   ` Sascha Hauer [this message]
2025-05-05 12:06 ` [PATCH 19/30] mci: add mci_set_timing helper Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 20/30] mci: imx-esdhc: add support for setting drive strength Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 21/30] mci: sdhci: move SDHCI_MAKE_BLKSZ definition to header Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 22/30] mci: imx-esdhc: select different pinctrl state depending on frequency Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 23/30] mci: core: retry MMC_CMD_SET_BLOCKLEN up to 4 times Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 24/30] mci: imx-esdhc: don't reconfigure clock unless required Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 25/30] mci: sdhci: fix sdhci_transfer_data MMC_SEND_TUNING compatibility Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 26/30] mci: core: implement mmc_send_tuning Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 27/30] mci: imx-esdhc: set burst_length_enable Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 28/30] mci: imx-esdhc: fixup quirks in standard SDHCI registers Ahmad Fatoum
2025-05-06  7:11   ` Sascha Hauer
2025-05-05 12:06 ` [PATCH 29/30] mci: sdhci: support Linux SDHCI_QUIRK2_BROKEN_HS200 flag Ahmad Fatoum
2025-05-05 12:06 ` [PATCH 30/30] mci: imx-esdhc: implement HS200 support Ahmad Fatoum
2025-05-05 12:41   ` Ahmad Fatoum

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