From: Johannes Roith <johannes@gnu-linux.rocks>
To: Michael Graichen <michael.graichen@hotmail.com>
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>,
"barebox@lists.infradead.org" <barebox@lists.infradead.org>
Subject: Re: Barebox for Zedboard
Date: Mon, 19 May 2025 20:41:43 +0200 [thread overview]
Message-ID: <aCt7Z5Dw3QhPgTNg@InfinityCube> (raw)
In-Reply-To: <VI1PR02MB4429AA325D9A08D898319A40AB9CA@VI1PR02MB4429.eurprd02.prod.outlook.com>
Am Mon, May 19, 2025 at 06:50:23AM +0000 schrieb Michael Graichen:
>
> Dear Johannes et al.
>
> i'am using
>
>
> for an PS<->PL FIFO.
> But this is not used within barebox in my case. It's only there because barebox passes it's devicetree to the Linux Kernel. I only do the programming of the FPGA in barebox within my init script by
>
> firmwareload -t zynq-fpga-manager /mnt/boot/design_1_wrapper.bit
>
> I will send the latest version of my zynq-fpga-manager to the mailing list soon.
> Please feel free to pick it up and finish my work since i did not do it since 2020.
>
> Best Regards,
> Michael
>
>
Dear Michael,
thanks for sharing. The patch worked on my board just fine after
increasing the timeouts a little bit :)
If you don't mind I can take care of the patches and incoperate the
feedback from the barebox maintainer and try to bring them upstream.
Best regards,
Johannes
next prev parent reply other threads:[~2025-05-19 19:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-19 10:38 Michael Graichen
2020-03-19 10:53 ` Lucas Stach
2020-03-23 14:22 ` AW: " Michael Graichen
2020-03-23 15:18 ` Michael Graichen
2025-05-16 19:03 ` Johannes Roith
2025-05-16 19:28 ` Ahmad Fatoum
2025-05-18 17:06 ` Johannes Roith
2025-05-19 4:55 ` Ahmad Fatoum
2025-05-26 7:23 ` Michael Tretter
2025-05-19 6:50 ` AW: " Michael Graichen
2025-05-19 18:41 ` Johannes Roith [this message]
2025-05-19 19:56 ` Ahmad Fatoum
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