From: Sascha Hauer <s.hauer@pengutronix.de>
To: Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: Renaud Barbier <renaud.barbier@ametek.com>, barebox@lists.infradead.org
Subject: Re: [PATCH 0/1] Initial ARMv7-A LPAE support
Date: Mon, 23 Feb 2026 12:52:06 +0100 [thread overview]
Message-ID: <aZw_ZpfzuReDI-wj@pengutronix.de> (raw)
In-Reply-To: <74d9ecd8-7c2d-4090-8ff0-7dd16d8b2be1@pengutronix.de>
On Mon, Feb 23, 2026 at 12:44:23PM +0100, Ahmad Fatoum wrote:
> Hello Sascha,
>
> On 2/23/26 12:40 PM, Sascha Hauer wrote:
> > Hi Renaud,
> >
> > On Tue, Feb 03, 2026 at 02:19:44PM +0000, Renaud Barbier wrote:
> >> The LPAE support allows to map physical address above the 32-bit space in
> >> the ARMv7-A processor to a 32-bit virtual address.
> >>
> >> This patch set was tested on a LS1021A-IOT. Later, a patch to the PCIe
> >> designware driver will be provided to prove the remapping of 40-bit PA to
> >> 32-bit VA.
> >>
> >> This patch does not include an update of the mmuinfo command.
> >>
> >> Renaud Barbier (1):
> >> arm: mmu: initial LPAE support
> >>
> >> arch/arm/Kconfig | 9 +
> >> arch/arm/configs/layerscape_v7_defconfig | 1 +
> >> arch/arm/cpu/Makefile | 4 +
> >> arch/arm/cpu/mmu_lpae.c | 650 ++++++++++++++++++++
> >> arch/arm/cpu/mmu_lpae.h | 101 +++
> >
> > The patch duplicates most of the existing MMU support. Can we do better?
>
> I had asked for it in this form, so I can get a look at how much
> duplication there is and how to go from there.
>
> I haven't come around yet to review it though, but I will try to find
> the time soon.
Ah, ok. Makes sense.
Sascha
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prev parent reply other threads:[~2026-02-23 11:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-03 14:19 Renaud Barbier
2026-02-03 14:19 ` [PATCH 1/1] arm: mmu: initial " Renaud Barbier
2026-02-23 11:40 ` [PATCH 0/1] Initial ARMv7-A " Sascha Hauer
2026-02-23 11:44 ` Ahmad Fatoum
2026-02-23 11:52 ` Sascha Hauer [this message]
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