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From: Matteo Fortini <matteo.fortini@gmail.com>
To: barebox@lists.infradead.org
Subject: [PATCH 2/2] sama5d3x: HSMC NAND initialize TIMINGS and import values from U-Boot
Date: Tue, 24 Jun 2014 13:26:32 +0200	[thread overview]
Message-ID: <assp.025283f2bc.1403609192-5862-3-git-send-email-matteo.fortini@gmail.com> (raw)
In-Reply-To: <1403609192-5862-1-git-send-email-matteo.fortini@gmail.com>

The configuration for NAND has been aligned with values
from U-Boot and completed with TIMINGS initialization

Signed-off-by: Matteo Fortini <matteo.fortini@gmail.com>
---
 arch/arm/boards/sama5d3xek/init.c | 31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c
index e078642..06e354c 100644
--- a/arch/arm/boards/sama5d3xek/init.c
+++ b/arch/arm/boards/sama5d3xek/init.c
@@ -72,21 +72,32 @@ static struct atmel_nand_data nand_pdata = {
 };
 
 static struct sam9_smc_config cm_nand_smc_config = {
-	.ncs_read_setup		= 0,
-	.nrd_setup		= 1,
-	.ncs_write_setup	= 0,
-	.nwe_setup		= 1,
+	.ncs_read_setup		= 1,
+	.nrd_setup		= 2,
+	.ncs_write_setup	= 1,
+	.nwe_setup		= 2,
 
-	.ncs_read_pulse		= 6,
-	.nrd_pulse		= 4,
+	.ncs_read_pulse		= 5,
+	.nrd_pulse		= 3,
 	.ncs_write_pulse	= 5,
 	.nwe_pulse		= 3,
 
-	.read_cycle		= 6,
-	.write_cycle		= 5,
+	.read_cycle		= 8,
+	.write_cycle		= 8,
 
 	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
-	.tdf_cycles		= 1,
+	.tdf_cycles		= 3,
+};
+
+static struct sam9_smc_sama5d3_extra_config cm_nand_smc_sama5d_extra_config = {
+	.tclr			= 3,
+	.tadl			= 10,
+	.tar			= 3,
+	.ocms			= 0,
+	.trr			= 4,
+	.twb			= 5,
+	.rbnsel			= 3,
+	.nfsel			= 1
 };
 
 static void ek_add_device_nand(void)
@@ -102,7 +113,7 @@ static void ek_add_device_nand(void)
 		cm_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
 	/* configure chip-select 3 (NAND) */
-	sam9_smc_configure(0, 3, &cm_nand_smc_config);
+	sam9_smc_sama5d3_configure(0, 3, &cm_nand_smc_config, &cm_nand_smc_sama5d_extra_config);
 
 	at91_add_device_nand(&nand_pdata);
 }
-- 
2.0.0


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  parent reply	other threads:[~2014-06-24 11:27 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1403609192-5862-1-git-send-email-matteo.fortini@gmail.com>
2014-06-24 11:26 ` [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register Matteo Fortini
2014-06-25  1:45   ` Bo Shen
2014-06-25  6:42     ` Sascha Hauer
2014-07-02 10:12       ` Raphaël Poggi
2014-07-04  7:47   ` Jean-Christophe PLAGNIOL-VILLARD
2014-07-04  8:28     ` Matteo Fortini
2014-07-07  6:20     ` Sascha Hauer
2014-07-07 18:17       ` Jean-Christophe PLAGNIOL-VILLARD
2014-07-08  5:39         ` Sascha Hauer
2014-07-04  7:49   ` Jean-Christophe PLAGNIOL-VILLARD
2014-06-24 11:26 ` Matteo Fortini [this message]
     [not found] <1405959207-21839-1-git-send-email-matteo.fortini@gmail.com>
2014-07-21 16:13 ` [PATCH 2/2] sama5d3x: HSMC NAND initialize TIMINGS and import values from U-Boot Matteo Fortini
     [not found] <1402045936-18733-1-git-send-email-matteo.fortini@gmail.com>
2014-06-06  9:12 ` Matteo Fortini

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