Re: [PATCH 12/19] ARM: use relative jumps in exception table

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Hello Sascha,

On 1/5/26 12:26 PM, Sascha Hauer wrote:
> Create position-independent exception vectors using relative branches
> instead of absolute addresses. This works on ARMv7 onwards which
> supports setting the address of the exception vectors.
> 
> New .text_inplace_exceptions section contains PC-relative branches,
> enabling barebox proper to start with MMU already configured using
> ELF segment addresses.
> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Why do we even need arm_fixup_vectors? There should already be
relocation entries emitted for .word symbol lines, so given that we only
install the vector table after relocation, it should be possible to
simply drop arm_fixup_vectors?

Cheers,
Ahmad

> ---
>  arch/arm/cpu/exceptions_32.S    | 20 ++++++++++++++++++++
>  arch/arm/cpu/interrupts_32.c    |  3 +--
>  arch/arm/cpu/mmu_32.c           |  5 +++--
>  arch/arm/cpu/no-mmu.c           | 11 +----------
>  arch/arm/include/asm/sections.h |  1 +
>  arch/arm/lib/pbl.lds.S          |  6 +++---
>  arch/arm/lib32/barebox.lds.S    |  4 ++++
>  7 files changed, 33 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/arm/cpu/exceptions_32.S b/arch/arm/cpu/exceptions_32.S
> index 235996f7ec296b44261637bc98c1c5ee30a3cbe1..302e4d030d6347e8fdb488db73a0a3a4bb1c0ec7 100644
> --- a/arch/arm/cpu/exceptions_32.S
> +++ b/arch/arm/cpu/exceptions_32.S
> @@ -156,6 +156,26 @@ ENTRY(arm_fixup_vectors)
>  ENDPROC(arm_fixup_vectors)
>  #endif
>  
> +.section .text_inplace_exceptions
> +1:	b 1b			/* barebox_arm_reset_vector */
> +#ifdef CONFIG_ARM_EXCEPTIONS
> +	b undefined_instruction	/* undefined instruction */
> +	b software_interrupt	/* software interrupt (SWI) */
> +	b prefetch_abort	/* prefetch abort */
> +	b data_abort		/* data abort */
> +1:	b 1b			/* (reserved) */
> +	b irq			/* irq (interrupt) */
> +	b fiq			/* fiq (fast interrupt) */
> +#else
> +1:	b 1b				/* undefined instruction */
> +1:	b 1b				/* software interrupt (SWI) */
> +1:	b 1b				/* prefetch abort */
> +1:	b 1b				/* data abort */
> +1:	b 1b				/* (reserved) */
> +1:	b 1b				/* irq (interrupt) */
> +1:	b 1b				/* fiq (fast interrupt) */
> +#endif
> +
>  .section .text_exceptions
>  .globl extable
>  extable:
> diff --git a/arch/arm/cpu/interrupts_32.c b/arch/arm/cpu/interrupts_32.c
> index 185646e38195b2bdc9f0d7e30d53a0506932fa13..6ebcbcd8dc1299c0333da87e496bc57172691fa8 100644
> --- a/arch/arm/cpu/interrupts_32.c
> +++ b/arch/arm/cpu/interrupts_32.c
> @@ -181,7 +181,6 @@ void arm_pbl_init_exceptions(void)
>  	if (cpu_architecture() < CPU_ARCH_ARMv7)
>  		return;
>  
> -	set_vbar((unsigned long)__exceptions_start);
> -	arm_fixup_vectors();
> +	set_vbar((unsigned long)__inplace_exceptions_start);
>  }
>  #endif
> diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
> index 86a55d165ba3cec5154c345a1a3a9cb959f0996f..9ce77078d5e35810f2239d82f29f67e2aa2e4d8e 100644
> --- a/arch/arm/cpu/mmu_32.c
> +++ b/arch/arm/cpu/mmu_32.c
> @@ -629,8 +629,9 @@ void setup_trap_pages(void)
>  	 * First try to use the vectors where they actually are, works
>  	 * on ARMv7 and later.
>  	 */
> -	if (!set_vector_table((unsigned long)__exceptions_start)) {
> -		arm_fixup_vectors();
> +	if (!set_vector_table((unsigned long)__inplace_exceptions_start)) {
> +		pr_debug("Using inplace exception vectors at 0x%08lx\n",
> +			 (unsigned long)__inplace_exceptions_start);
>  		create_zero_page();
>  		return;
>  	}
> diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c
> index c4ef5d1f9d55136d606c244309dbeeb8fd988784..68246d71156c7c84b9faff452cebb37132b83573 100644
> --- a/arch/arm/cpu/no-mmu.c
> +++ b/arch/arm/cpu/no-mmu.c
> @@ -21,8 +21,6 @@
>  #include <asm/sections.h>
>  #include <asm/cputype.h>
>  
> -#define __exceptions_size (__exceptions_stop - __exceptions_start)
> -
>  static bool has_vbar(void)
>  {
>  	u32 mainid;
> @@ -41,7 +39,6 @@ static bool has_vbar(void)
>  
>  static int nommu_v7_vectors_init(void)
>  {
> -	void *vectors;
>  	u32 cr;
>  
>  	if (cpu_architecture() < CPU_ARCH_ARMv7)
> @@ -58,13 +55,7 @@ static int nommu_v7_vectors_init(void)
>  	cr &= ~CR_V;
>  	set_cr(cr);
>  
> -	arm_fixup_vectors();
> -
> -	vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
> -	memset(vectors, 0, PAGE_SIZE);
> -	memcpy(vectors, __exceptions_start, __exceptions_size);
> -
> -	set_vbar((unsigned int)vectors);
> +	set_vbar((unsigned int)__inplace_exceptions_start);
>  
>  	return 0;
>  }
> diff --git a/arch/arm/include/asm/sections.h b/arch/arm/include/asm/sections.h
> index 15b1a6482a5b148284ab47de2db1c2653909da09..bf4fb7b109a7a22d9a298257af23a11b9efe6861 100644
> --- a/arch/arm/include/asm/sections.h
> +++ b/arch/arm/include/asm/sections.h
> @@ -13,6 +13,7 @@ extern char __dynsym_start[];
>  extern char __dynsym_end[];
>  extern char __exceptions_start[];
>  extern char __exceptions_stop[];
> +extern char __inplace_exceptions_start[];
>  
>  #endif
>  
> diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
> index 9c51f5eb3a3d8256752a78e03fed851c84d92edb..53b21084cff2e3d916cd37485281f2f78166c37d 100644
> --- a/arch/arm/lib/pbl.lds.S
> +++ b/arch/arm/lib/pbl.lds.S
> @@ -53,9 +53,9 @@ SECTIONS
>  		*(.text_bare_init*)
>  		__bare_init_end = .;
>  		. = ALIGN(0x20);
> -		__exceptions_start = .;
> -		KEEP(*(.text_exceptions*))
> -		__exceptions_stop = .;
> +		__inplace_exceptions_start = .;
> +		KEEP(*(.text_inplace_exceptions*))
> +		__inplace_exceptions_stop = .;
>  		*(.text*)
>  	}
>  
> diff --git a/arch/arm/lib32/barebox.lds.S b/arch/arm/lib32/barebox.lds.S
> index ede6889991f16d00f2bad79dd777ae9b5e639ff4..9b2b65e2f17d62d5134fc367621cce733dcea06a 100644
> --- a/arch/arm/lib32/barebox.lds.S
> +++ b/arch/arm/lib32/barebox.lds.S
> @@ -26,6 +26,10 @@ SECTIONS
>  		__exceptions_start = .;
>  		KEEP(*(.text_exceptions*))
>  		__exceptions_stop = .;
> +		. = ALIGN(0x20);
> +		__inplace_exceptions_start = .;
> +		KEEP(*(.text_inplace_exceptions*))
> +		__inplace_exceptions_stop = .;
>  		*(.text*)
>  	}
>  	BAREBOX_BARE_INIT_SIZE
> 

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