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From: Ye Li <ye.li@oss.nxp.com>
To: Ahmad Fatoum <a.fatoum@pengutronix.de>,
	Peng Fan <peng.fan@nxp.com>,
	"Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: U-Boot Mailing List <u-boot@lists.denx.de>,
	"barebox@lists.infradead.org" <barebox@lists.infradead.org>,
	dl-uboot-imx <uboot-imx@nxp.com>,
	Steffen Trumtrar <str@pengutronix.de>
Subject: Re: i.MX8/9: question about unused DDR PHY trained CSR board array
Date: Fri, 20 Dec 2024 09:58:38 +0800	[thread overview]
Message-ID: <d4acb710-7c80-4b71-862e-cee0a16d8cba@oss.nxp.com> (raw)
In-Reply-To: <2200ece8-593b-4ac3-be3e-b05570165e5e@pengutronix.de>

Hi Ahmad,

On 12/19/2024 6:27 PM, Ahmad Fatoum wrote:
> Hello Peng,
>
> On 30.09.24 08:38, Peng Fan wrote:
>>> Subject: i.MX8/9: question about unused DDR PHY trained CSR board
>>> array
>>> Looking at the DDR setup code for i.MX8M and i.MX9 that you had
>>> contributed, I am wondering about struct
>>> dram_cfg_param::ddrphy_trained_csr and the global
>>> ddrphy_trained_csr array.
>>>
>>> struct dram_cfg_param::ddrphy_trained_csr is presumably generated
>>> by the i.MX DDR tool and it seems populated by all the i.MX8M/9
>>> boards in U-Boot.
>>>
>>> This struct member is wholly unused though and instead a global
>>> ddrphy_trained_csr is used.
>>>
>>> What I wonder about is whether it's possible for the DDR tool to
>>> generate a different ddrphy_trained_csr than the default:
>>>
>>>    1) If yes, we should drop the global ddrphy_trained_csr and actually
>>> use
>>>       the board-specific array
>>>
>>>    2) If not, we should drop the board-specific array and perhaps ask for
>>>      the DDR tool to be changed
>>>
>>> I initially assumed 1) and because all boards supported by barebox had
>>> a board-specific ddrphy_trained_csr that's identical to the global
>>> ddrphy_trained_csr, I dropped the unused array[1][2].
>>>
>>> I now have the DDR settings for an i.MX9 LPDDR4 board in front of me
>>> that has different contents for struct
>>> dram_cfg_param::ddrphy_trained_csr than the default.
>>>
>>> I will inquire how that came about, but in parallel I wanted to ask you if
>>> this is supposed to happen and to alert you to this issue.
>> Thanks for raising this issue. I think board specific csr should be used.
>>
>> I will check with DDR TOOL owners on this.
> Did you hear back in the meantime?
>
> Thanks,
> Ahmad

We have discussed this internally. The DDR tool may generate different 
board specific csr. Currently in DDR retention, because we load csr + 
ddr_phy_pie, so it is safe to use this global csr.

But we agree this global csr is confused and waste some memory. It is 
better to switch to the board csr.


Best regards,

Ye Li

>>> The way things are, this is either a bug or a missed space saving
>>> opportunity for U-Boot.
>> Thanks,
>> Peng.
>>
>>
>



  reply	other threads:[~2024-12-20  1:59 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-27 14:08 Ahmad Fatoum
2024-09-30  6:38 ` Peng Fan
2024-12-19 10:27   ` Ahmad Fatoum
2024-12-20  1:58     ` Ye Li [this message]
2024-12-20  6:12       ` Ahmad Fatoum
2024-12-20 12:06         ` Ye Li

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