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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	"open list:BAREBOX" <barebox@lists.infradead.org>
Subject: Re: [PATCH 2/9] ARM: Layerscape: TQMLS1046a: add support for 8GiB variant
Date: Mon, 21 Oct 2024 11:06:47 +0200	[thread overview]
Message-ID: <f4a3b122-28c3-4e23-aba1-2a41d3c77425@pengutronix.de> (raw)
In-Reply-To: <20241021-arm-layerscape-tfa-v1-2-0980697b6f66@pengutronix.de>

Hello Sascha,

On 21.10.24 09:21, Sascha Hauer wrote:
> The tqmls1046a also has a 8GiB DDR variant. This patch adds support for
> this variant as an additional image with suffix _8g in the name.
> 
> The 8GiB boards use two different types of DDR chips which can be
> distinguished by reading the EEPROM. There is one regular version which
> has the string "TQMLS1046A-P2.0201" is the EEPROM. The other one is
> possibly only used for Arkona and has the string "TQMLS1046A-CA.0202"
> in the EEPROM. There might be other possible strings we are currently
> not aware of, we fall back to the P2 variant in this case.
> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---

[snip]

> -static int tqmls1046a_mem_init(void)
> +static void ls1046a_add_memory(void)
>  {
> +	u32 cs0_bnds;
> +	unsigned long long memsize, lower, upper;

Nitpick: u64

> +ENTRY_PROC(start_tqmls1046a_8g)
> +	mov x3, #STACK_TOP
> +	mov sp, x3
> +	b tqmls1046a_8g_entry

We should be able to migrate these assembly entry points to
use ENTRY_FUNCTION_WITHSTACK.

> +ENTRY_PROC_END(start_tqmls1046a_8g)
> diff --git a/images/Makefile.layerscape b/images/Makefile.layerscape
> index 9cb88270d7..cfbe4ca35b 100644
> --- a/images/Makefile.layerscape
> +++ b/images/Makefile.layerscape
> @@ -62,8 +62,20 @@ $(obj)/barebox-tqmls1046a-qspi.image: $(obj)/start_tqmls1046a.pblb \
>  		$(board)/tqmls1046a/tqmls1046a_pbi.cfg
>  	$(call if_changed,lspbl_spi_image,ls1046a)
>  
> +$(obj)/barebox-tqmls1046a-8g-sd.image: $(obj)/start_tqmls1046a_8g.pblb \
> +		$(board)/tqmls1046a/tqmls1046a_rcw_sd_3333_5559.cfg \
> +		$(board)/tqmls1046a/tqmls1046a_pbi.cfg

There should be a FORCE dependency here, given that if_changed is used.

> +	$(call if_changed,lspbl_image,ls1046a)
> +
> +$(obj)/barebox-tqmls1046a-8g-qspi.image: $(obj)/start_tqmls1046a_8g.pblb \
> +		$(board)/tqmls1046a/tqmls1046a_rcw_qspi_3333_5559.cfg \
> +		$(board)/tqmls1046a/tqmls1046a_pbi.cfg

Likewise.

Cheers,
Ahmad



-- 
Pengutronix e.K.                           |                             |
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  reply	other threads:[~2024-10-21  9:08 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-21  7:21 [PATCH 0/9] ARM: Layerscape: LS1046a: switch to TF-A Sascha Hauer
2024-10-21  7:21 ` [PATCH 1/9] ARM: Layerscape: TQMLS1046a: Update DDR timings Sascha Hauer
2024-10-21  7:21 ` [PATCH 2/9] ARM: Layerscape: TQMLS1046a: add support for 8GiB variant Sascha Hauer
2024-10-21  9:06   ` Ahmad Fatoum [this message]
2024-10-21 11:20     ` Sascha Hauer
2024-10-21 11:20       ` Ahmad Fatoum
2024-10-21  7:21 ` [PATCH 3/9] ARM: Layerscape: ls1046ardb: remove unused variable Sascha Hauer
2024-10-21  7:21 ` [PATCH 4/9] ARM: Layerscape: remove register arguments Sascha Hauer
2024-10-21  7:21 ` [PATCH 5/9] ARM: Layerscape: LS1046a: add TF-A support Sascha Hauer
2024-10-21  9:12   ` Ahmad Fatoum
2024-10-21  7:21 ` [PATCH 6/9] ARM: Layerscape: LS1046a-rdb: Switch to " Sascha Hauer
2024-10-21  7:21 ` [PATCH 7/9] ARM: Layerscape: TQMLS1046a: " Sascha Hauer
2024-10-21  7:21 ` [PATCH 8/9] ARM: Layerscape: LS1046a: remove PPA support Sascha Hauer
2024-10-21  8:55   ` Ahmad Fatoum
2024-10-21 14:18     ` Sascha Hauer
2024-10-22  7:46       ` Sascha Hauer
2024-10-21  7:21 ` [PATCH 9/9] ARM: Layerscape: LS1046a: add PSCI node Sascha Hauer
2024-10-21  7:33   ` Ahmad Fatoum
2024-10-21  7:57     ` Sascha Hauer
2024-10-21  8:02       ` Ahmad Fatoum
2024-10-21  8:03   ` Ahmad Fatoum

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