From: Ahmad Fatoum <ahmad@a3f.at>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <ahmad@a3f.at>
Subject: [PATCH master 2/2] virtio: pci: remove inaccurate comment on 64-bit bar addr incompatibility
Date: Sat, 10 Apr 2021 12:49:11 +0200 [thread overview]
Message-ID: <20210410104911.2079451-2-ahmad@a3f.at> (raw)
In-Reply-To: <20210410104911.2079451-1-ahmad@a3f.at>
pci_iomap returns the bar base address, which can already be > 4G on
barebox. The comment originates from U-Boot, where indeed only the lower
32-bit are read. We don't have this limitation and qemu -M q35 places
bars for VirtIO devices at >= 0x8_0000_0000 and they worked correctly,
so drop the inaccurate comment.
Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
drivers/virtio/virtio_pci_modern.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c
index 180c14771aad..d828bee69e62 100644
--- a/drivers/virtio/virtio_pci_modern.c
+++ b/drivers/virtio/virtio_pci_modern.c
@@ -335,13 +335,6 @@ static void __iomem *virtio_pci_map_capability(struct pci_dev *dev, int off)
offset = off + offsetof(struct virtio_pci_cap, offset);
pci_read_config_dword(dev, offset, &offset);
- /*
- * TODO: adding 64-bit BAR support
- *
- * Per spec, the BAR is permitted to be either 32-bit or 64-bit.
- * For simplicity, only read the BAR address as 32-bit.
- */
-
return pci_iomap(dev, bar) + offset;
}
--
2.30.0
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next prev parent reply other threads:[~2021-04-10 10:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-10 10:49 [PATCH master 1/2] virtio: pci: fix 64-bit incompatibility Ahmad Fatoum
2021-04-10 10:49 ` Ahmad Fatoum [this message]
2021-04-13 7:19 ` Sascha Hauer
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