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From: Ahmad Fatoum <ahmad@a3f.at>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <ahmad@a3f.at>
Subject: [PATCH 1/4] x86: add DMA support
Date: Fri, 16 Apr 2021 08:24:33 +0200	[thread overview]
Message-ID: <20210416062436.332665-2-ahmad@a3f.at> (raw)
In-Reply-To: <20210416062436.332665-1-ahmad@a3f.at>

Both interconnect and PCI are cache coherent on x86, so we shouldn't
need any special CPU barriers for DMA. Indeed, Linux defined neither
ARCH_HAS_SYNC_DMA_FOR_CPU nor ARCH_HAS_SYNC_DMA_FOR_DEVICE on x86.

It thus seems that the only reordering we need to take care of is
compiler-induced reordering. The Linux memory model that barebox adheres
to as well demands that all accesses to shared data are volatile.

volatile accesses are already guarnateed to not be reordered against
each other, so we don't even need an explicit barrier(), which is
already the case on other architectures that have a disabled MMU.

Cc: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/x86/Kconfig           |  1 +
 arch/x86/include/asm/dma.h | 36 +++++++++++++++++++++++++++++++++++-
 2 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 311c3d1a8ec5..bcb44b23f05a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -4,6 +4,7 @@
 config X86
 	bool
 	select HAS_KALLSYMS
+	select HAS_DMA
 	select GENERIC_FIND_NEXT_BIT
 	default y
 
diff --git a/arch/x86/include/asm/dma.h b/arch/x86/include/asm/dma.h
index 3dab2b688d8e..8a3b044f3a9c 100644
--- a/arch/x86/include/asm/dma.h
+++ b/arch/x86/include/asm/dma.h
@@ -4,6 +4,40 @@
 #ifndef __ASM_DMA_H
 #define __ASM_DMA_H
 
-/* empty */
+#include <linux/string.h>
+#include <linux/compiler.h>
+#include <xfuncs.h>
+#include <malloc.h>
+
+/*
+ * x86 is cache coherent, so we need not do anything special here
+ */
+
+static inline void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle)
+{
+	void *ret = xmemalign(4096, size);
+	if (dma_handle)
+		*dma_handle = (dma_addr_t)ret;
+
+	memset(ret, 0, size);
+
+	return ret;
+}
+
+static inline void dma_free_coherent(void *mem, dma_addr_t dma_handle,
+				     size_t size)
+{
+	free(mem);
+}
+
+static inline void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
+					   enum dma_data_direction dir)
+{
+}
+
+static inline void dma_sync_single_for_device(dma_addr_t address, size_t size,
+					      enum dma_data_direction dir)
+{
+}
 
 #endif /* __ASM_DMA_H */
-- 
2.31.0


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  reply	other threads:[~2021-04-16  6:28 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-16  6:24 [PATCH 0/4] x86: add EFI PCI host and iTCO watchdog support Ahmad Fatoum
2021-04-16  6:24 ` Ahmad Fatoum [this message]
2021-04-16  6:24 ` [PATCH 2/4] PCI: support PCI BIOS preassigned buses Ahmad Fatoum
2021-04-16  6:24 ` [PATCH 3/4] pci: add EFI PCI root bridge IO protocol driver Ahmad Fatoum
2021-04-16  6:24 ` [PATCH 4/4] watchdog: add support for Intel TCO watchdog timer Ahmad Fatoum
2021-05-03 12:07 ` [PATCH 0/4] x86: add EFI PCI host and iTCO watchdog support Sascha Hauer

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