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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 2/3] RISC-V: asm: barebox-riscv-head: use load-offset of 0
Date: Tue,  4 May 2021 12:45:12 +0200	[thread overview]
Message-ID: <20210504104513.2640-2-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210504104513.2640-1-a.fatoum@pengutronix.de>

Incoming RISC-V bootm implementation will use the same bootm handler for
booting both kernel and barebox. For this to work, the load offset in
the header needs to make sense. As non-generic DT barebox images have
enough knowledge about the platform to know where to place the stack,
they don't require a load offset, thus set it to zero.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/include/asm/barebox-riscv-head.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/barebox-riscv-head.h b/arch/riscv/include/asm/barebox-riscv-head.h
index f681ec8bcee6..a4c33472cd53 100644
--- a/arch/riscv/include/asm/barebox-riscv-head.h
+++ b/arch/riscv/include/asm/barebox-riscv-head.h
@@ -30,7 +30,7 @@
 
 #ifndef __barebox_riscv_head
 #define __barebox_riscv_head() \
-	__barebox_riscv_header("nop", 0x55555555FFFFFFFF, 0x0, "barebox", "RSCV")
+	__barebox_riscv_header("nop", 0x0, 0x0, "barebox", "RSCV")
 #endif
 
 #endif /* __ASM_RISCV_HEAD_H */
-- 
2.29.2


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  reply	other threads:[~2021-05-04 10:46 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-04 10:45 [PATCH 1/3] bootm: move ARM64 Linux image parsing to common directory Ahmad Fatoum
2021-05-04 10:45 ` Ahmad Fatoum [this message]
2021-05-04 10:45 ` [PATCH 3/3] RISC-V: add Linux kernel boot support Ahmad Fatoum
2021-05-07  7:28 ` [PATCH 1/3] bootm: move ARM64 Linux image parsing to common directory Sascha Hauer

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