From: Michael Riesch <michael.riesch@wolfvision.net>
To: barebox@lists.infradead.org
Cc: Michael Riesch <michael.riesch@wolfvision.net>
Subject: [PATCH v2 2/2] arm: rk3568-evb1: add support for Rockchip SARADC
Date: Wed, 23 Jun 2021 09:52:01 +0200 [thread overview]
Message-ID: <20210623075201.5328-3-michael.riesch@wolfvision.net> (raw)
In-Reply-To: <20210623075201.5328-1-michael.riesch@wolfvision.net>
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
v2:
- add initial version
arch/arm/dts/rk3568-evb1-v10.dts | 5 +++++
arch/arm/dts/rk3568.dtsi | 12 ++++++++++++
2 files changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts
index ca6f9c280..b8b4c85bf 100644
--- a/arch/arm/dts/rk3568-evb1-v10.dts
+++ b/arch/arm/dts/rk3568-evb1-v10.dts
@@ -485,3 +485,8 @@
&uart2 {
status = "okay";
};
+
+&saradc {
+ vref-supply = <&vcca_1v8>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 34d0b8a08..8a75a7e96 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -817,6 +817,18 @@
status = "disabled";
};
+ saradc: saradc@fe720000 {
+ compatible = "rockchip,rk3568-saradc";
+ reg = <0x0 0xfe720000 0x0 0x100>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ resets = <&cru SRST_P_SARADC>;
+ reset-names = "saradc-apb";
+ #io-channel-cells = <1>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3568-pinctrl";
rockchip,grf = <&grf>;
--
2.20.1
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next prev parent reply other threads:[~2021-06-23 7:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 7:51 [PATCH v2 0/2] " Michael Riesch
2021-06-23 7:52 ` [PATCH v2 1/2] aiodev: add driver " Michael Riesch
2021-06-23 8:22 ` Ahmad Fatoum
2021-06-23 7:52 ` Michael Riesch [this message]
2021-06-23 8:24 ` [PATCH v2 2/2] arm: rk3568-evb1: add support " Ahmad Fatoum
2021-06-24 15:13 ` Michael Riesch
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