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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 09/14] ARM: i.MX: xload nand: Use final page layout from FCB
Date: Tue,  1 Nov 2022 16:30:43 +0100	[thread overview]
Message-ID: <20221101153048.772146-10-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20221101153048.772146-1-s.hauer@pengutronix.de>

For non ONFI NAND chips we decode the page layout from the extended ID
information from NAND (basically what nand_decode_ext_id() does in the
MTD layer). For some chips this information is not entirely correct
though. For example some Toshiba chips have this quirk:

        /*
         * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
         * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
         * follows:
         * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
         *                         110b -> 24nm
         * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
         */
        if (chip->id.len >= 6 && nand_is_slc(chip) &&
            (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
            !(chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND) /* !BENAND */) {
                memorg->oobsize = 32 * memorg->pagesize >> 9;
                mtd->oobsize = memorg->oobsize;
        }

We could try and add these kind of quirks into the xload code, but we
already have the correct information in the FCB. So as long as the
initial information from the ID is enough to read the FCB, we can use
the information containekd therein for further reading from the NAND.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-imx/xload-gpmi-nand.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/mach-imx/xload-gpmi-nand.c b/arch/arm/mach-imx/xload-gpmi-nand.c
index 543ec108ba..af20c11fa6 100644
--- a/arch/arm/mach-imx/xload-gpmi-nand.c
+++ b/arch/arm/mach-imx/xload-gpmi-nand.c
@@ -1020,6 +1020,8 @@ static int __maybe_unused imx6_nand_load_image(struct imx_nand_params *params,
 	};
 	int ret;
 	struct fcb_block *fcb;
+	void __iomem *bch_regs = info->bch_base;
+	u32 fl0, fl1;
 
 	info->dma_channel = &pchan;
 
@@ -1047,6 +1049,21 @@ static int __maybe_unused imx6_nand_load_image(struct imx_nand_params *params,
 		fcb->Firmware2_startingPage);
 	pr_debug("PagesInFW2:       0x%08x\n", fcb->PagesInFirmware2);
 
+	info->organization.oobsize = fcb->TotalPageSize - fcb->PageDataSize;
+	info->organization.pagesize = fcb->PageDataSize;
+
+	fl0 = FIELD_PREP(BCH_FLASHLAYOUT0_NBLOCKS, fcb->NumEccBlocksPerPage) |
+		FIELD_PREP(BCH_FLASHLAYOUT0_META_SIZE, fcb->MetadataBytes) |
+		FIELD_PREP(IMX6_BCH_FLASHLAYOUT0_ECC0, fcb->EccBlock0EccType) |
+		(fcb->BCHType ? BCH_FLASHLAYOUT0_GF13_0_GF14_1 : 0) |
+		FIELD_PREP(BCH_FLASHLAYOUT0_DATA0_SIZE, fcb->EccBlock0Size / 4);
+	fl1 = FIELD_PREP(BCH_FLASHLAYOUT1_PAGE_SIZE, fcb->TotalPageSize) |
+		FIELD_PREP(IMX6_BCH_FLASHLAYOUT1_ECCN, fcb->EccBlockNEccType) |
+		(fcb->BCHType ? BCH_FLASHLAYOUT1_GF13_0_GF14_1 : 0) |
+		FIELD_PREP(BCH_FLASHLAYOUT1_DATAN_SIZE, fcb->EccBlockNSize / 4);
+	writel(fl0, bch_regs + BCH_FLASH0LAYOUT0);
+	writel(fl1, bch_regs + BCH_FLASH0LAYOUT1);
+
 	get_dbbt(info, databuf);
 
 	ret = read_firmware(info, fcb->Firmware1_startingPage, dest, len);
-- 
2.30.2




  parent reply	other threads:[~2022-11-01 15:34 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-01 15:30 [PATCH 00/14] Add i.MX7 NAND xload support Sascha Hauer
2022-11-01 15:30 ` [PATCH 01/14] mtd: nand: nand-mxs: Move register definitions to separate file Sascha Hauer
2022-11-02  8:08   ` Marco Felsch
2022-11-01 15:30 ` [PATCH 02/14] ARM: i.MX: xload nand: Use common register defines Sascha Hauer
2022-11-02  8:10   ` Marco Felsch
2022-11-01 15:30 ` [PATCH 03/14] ARM: i.MX: xload nand: add common readid Sascha Hauer
2022-11-02  8:23   ` Marco Felsch
2022-11-01 15:30 ` [PATCH 04/14] dma: apbh-dma: Simplify code Sascha Hauer
2022-11-01 15:30 ` [PATCH 05/14] dma: apbh-dma: unify register defines Sascha Hauer
2022-11-01 15:30 ` [PATCH 06/14] ARM: i.MX: xload-gpmi-nand: refactor for more SoC support Sascha Hauer
2022-11-01 15:30 ` [PATCH 07/14] imx-bbu-nand-fcb: pull printing debug info out of get_fcb() Sascha Hauer
2022-11-01 15:30 ` [PATCH 08/14] ARM: i.MX: xload nand: Pull ECC status checking out of read page Sascha Hauer
2022-11-02  8:33   ` Marco Felsch
2022-11-01 15:30 ` Sascha Hauer [this message]
2022-11-01 15:30 ` [PATCH 10/14] imx-bbu-nand-fcb: Fix reading FCB information from BCH registers Sascha Hauer
2022-11-01 15:30 ` [PATCH 11/14] ARM: i.MX: xload nand: reset NAND before accessing it Sascha Hauer
2022-11-01 15:30 ` [PATCH 12/14] ARM: i.MX: xload nand: Move mxs_nand_mode_fcb_62bit() to header file Sascha Hauer
2022-11-02  8:37   ` Marco Felsch
2022-11-01 15:30 ` [PATCH 13/14] ARM: i.MX: xload nand: Implement i.MX7 support Sascha Hauer
2022-11-02  8:41   ` Marco Felsch
2022-11-02  8:46     ` Sascha Hauer
2022-11-01 15:30 ` [PATCH 14/14] imx-bbu-nand-fcb: Add fcb command Sascha Hauer
2022-11-02  8:44   ` Marco Felsch
2022-11-02 10:55     ` Sascha Hauer
2022-11-02 11:01       ` Marco Felsch
2022-11-02 11:29         ` Sascha Hauer

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