From: Sascha Hauer <s.hauer@pengutronix.de>
To: BAREBOX <barebox@lists.infradead.org>
Subject: [PATCH 1/6] mci: sdhci: rockchip: set hidspd before re-enabling the clock
Date: Thu, 07 May 2026 09:02:47 +0200 [thread overview]
Message-ID: <20260507-rockchip-emmc-v1-1-5e8109e8059d@pengutronix.de> (raw)
In-Reply-To: <20260507-rockchip-emmc-v1-0-5e8109e8059d@pengutronix.de>
Linux changes the SDHCI_CTRL_HISPD bit while the clock is disabled. While
I haven't observed any failures because of this, do the same as Linux to be
on the safe side.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/mci/rockchip-dwcmshc-sdhci.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/mci/rockchip-dwcmshc-sdhci.c b/drivers/mci/rockchip-dwcmshc-sdhci.c
index 8e55190eb8..981f90af63 100644
--- a/drivers/mci/rockchip-dwcmshc-sdhci.c
+++ b/drivers/mci/rockchip-dwcmshc-sdhci.c
@@ -146,6 +146,15 @@ static void rk_sdhci_set_clock(struct rk_sdhci_host *host, unsigned int clock)
clk_set_rate(host->clks[CLK_CORE].clk, clock);
+ extra = sdhci_read8(&host->sdhci, SDHCI_HOST_CONTROL);
+
+ if (clock > 26000000)
+ extra |= SDHCI_CTRL_HISPD;
+ else
+ extra &= ~SDHCI_CTRL_HISPD;
+
+ sdhci_write8(&host->sdhci, SDHCI_HOST_CONTROL, extra);
+
sdhci_set_clock(&host->sdhci, clock, clk_get_rate(host->clks[CLK_CORE].clk));
/* Disable cmd conflict check */
@@ -212,7 +221,6 @@ static void rk_sdhci_set_clock(struct rk_sdhci_host *host, unsigned int clock)
static void rk_sdhci_set_ios(struct mci_host *mci, struct mci_ios *ios)
{
struct rk_sdhci_host *host = to_rk_sdhci_host(mci);
- u16 val;
/* stop clock */
sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, 0);
@@ -221,15 +229,6 @@ static void rk_sdhci_set_ios(struct mci_host *mci, struct mci_ios *ios)
rk_sdhci_set_clock(host, ios->clock);
sdhci_set_bus_width(&host->sdhci, ios->bus_width);
-
- val = sdhci_read8(&host->sdhci, SDHCI_HOST_CONTROL);
-
- if (ios->clock > 26000000)
- val |= SDHCI_CTRL_HISPD;
- else
- val &= ~SDHCI_CTRL_HISPD;
-
- sdhci_write8(&host->sdhci, SDHCI_HOST_CONTROL, val);
}
static void print_error(struct rk_sdhci_host *host, int cmdidx)
--
2.47.3
next prev parent reply other threads:[~2026-05-07 7:04 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-07 7:02 [PATCH 0/6] mci: rockchip-dwcmshc: add HS200 support Sascha Hauer
2026-05-07 7:02 ` Sascha Hauer [this message]
2026-05-07 8:05 ` [PATCH 1/6] mci: sdhci: rockchip: set hidspd before re-enabling the clock Ahmad Fatoum
2026-05-07 7:02 ` [PATCH 2/6] mci: sdhci: rockchip: disable clock while setting DLL Sascha Hauer
2026-05-07 8:10 ` Ahmad Fatoum
2026-05-07 7:02 ` [PATCH 3/6] mci: sdhci: rockchip: Wait for transfer complete interrupt with MMC_RSP_BUSY cmd Sascha Hauer
2026-05-07 8:11 ` Ahmad Fatoum
2026-05-07 7:02 ` [PATCH 4/6] mci: sdhci: rockchip: Update pre-change delay for rockchip platform Sascha Hauer
2026-05-07 8:12 ` Ahmad Fatoum
2026-05-07 7:02 ` [PATCH 5/6] clk: composite: pick best parent for round_rate / set_rate Sascha Hauer
2026-05-07 7:02 ` [PATCH 6/6] mci: sdhci: rockchip: officially support HS200 Sascha Hauer
2026-05-07 8:15 ` Ahmad Fatoum
2026-05-07 8:36 ` Sascha Hauer
2026-05-07 7:47 ` [PATCH 0/6] mci: rockchip-dwcmshc: add HS200 support Ahmad Fatoum
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