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From: "Sascha Hauer" <s.hauer@pengutronix.de>
To: "Alexander Shiyan" <eagle.alexander923@gmail.com>
Cc: "Barebox List" <barebox@lists.infradead.org>
Subject: Re: RK3588 optee question
Date: Wed, 12 Aug 2026 06:25:54 +0000	[thread overview]
Message-ID: <20260812062554.ykkk2UQ8653ZVyprnuIkP5_KL2oLogqTciPQqKZpIrA@z> (raw)
In-Reply-To: <CAP1tNvQBxkjkCX7=zYt5ACjUUi+c2FkbCjz7UG+vQeVKeNB_Og@mail.gmail.com>

On 2026-08-11 14:51, Alexander Shiyan wrote:
> Hello All.
> 
> BL31 = rockchip bl31 from rkbin
> BL32 = tee.bin builded from https://github.com/OP-TEE/optee_os.git
> 
> DDR cb12b99cc23 hcy 25/10/17-18:57:13,fwver: v1.21
> ...
> NOTICE:  BL31: v2.3():v2.3-964-g8319968f5:derrick.huang, fwver: v1.54
> NOTICE:  BL31: Built : 17:20:23, Dec 26 2025
> ...
> INFO:    BL31: Initialising Exception Handling Framework
> INFO:    BL31: Initializing runtime services
> INFO:    BL31: Initializing BL32
> INFO:    BL31: Preparing for EL3 exit to normal world
> INFO:    Entry point address = 0xb00000
> INFO:    SPSR = 0x3c9
> 
> barebox 2026.07.0-00839-g50ae8812b950-dirty #144 Tue Aug 11 14:39:36 MSK 2026
> 
> Board: Diasom DS-RK3588-BTB-EVB
> rockchip-dmc memory-controller.of: Detected memory size: 0x100000000
> netconsole: registered as netconsole-1
> fan53555-regulator rk86020: FAN53555 Option[10] Rev[1] Detected!
> vdd2_ddr: Bringing 500000uV into 1100000-1100000uV
> vddq_ddr: Bringing 500000uV into 600000-600000uV
> rockchip_saradc fec10000.adc@fec10000.of: registered as aiodev0
> BTB revision: 3
> EVB revision: 2
> EVB HAT Addon detected.
> arm-scmi firmware:scmi.of: SCMI Protocol v2.0 'rockchip:' Firmware version 0x0
> optee: smc_abi: probing for conduit method.
> optee: smc_abi: revision 4.10 (71196403f6f9f642)
> ERROR: optee: smc_abi: driver requires OP-TEE dynamic shared memory support

In OP-TEE this goes down to:

#if defined(CFG_CORE_DYN_SHM)
          dyn_shm_en = core_mmu_nsec_ddr_is_defined();
          if (dyn_shm_en)
                  args->a1 |= OPTEE_SMC_SEC_CAP_DYNAMIC_SHM;
#endif

So either you have compiled OP-TEE without CFG_CORE_DYN_SHM enabled
(unlikely, it's the default), or core_mmu_nsec_ddr_is_defined() fails
which means OP-TEE doesn't know where your memory is. OP-TEE gets this
information from the device tree. Do you pass a device tree to OP-TEE?
barebox only does it when CONFIG_ARCH_ROCKCHIP_ATF_PASS_FDT is enabled
which currently is not the default as there are some Rockchip TF-A
binaries shipped by Rockchip which do not handle a fdt being passed.

Looking at your TF-A version you might have one of these, so you likely
have to update your TF-A to an upstream one.

Side note: Look at bl31_entry(). if it gets a fdt_addr that will be
passed to both TF-A and OP-TEE. You *could* try passing NULL as fdt to
atf_entry() to pass the fdt only to OP-TEE and not to TF-A, but I
wouldn't encourage that.

Sascha

--
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |




  parent reply	other threads:[~2026-08-12  6:27 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-11 11:51 Alexander Shiyan
2026-08-11 12:19 ` Ahmad Fatoum
2026-08-11 12:54   ` Alexander Shiyan
2026-08-11 14:07     ` Ahmad Fatoum
2026-08-11 14:13       ` Alexander Shiyan
2026-08-12  6:25 ` Sascha Hauer [this message]
     [not found] ` <6a7c11f4.bd9e1b36.35e6eb.4491SMTPIN_ADDED_MISSING@mx.google.com>
2026-08-12 14:44   ` Alexander Shiyan
2026-08-13  6:41     ` Sascha Hauer
     [not found]     ` <6a7d6747.1bdbcb37.263332.61abSMTPIN_ADDED_MISSING@mx.google.com>
2026-08-14  6:49       ` Alexander Shiyan

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