From: Florijan Plohl <florijan.plohl@norik.com>
To: s.hauer@pengutronix.de, barebox@lists.infradead.org
Cc: upstream@lists.phytec.de
Subject: [PATCH v2] ARM: boards: phytec-som-imx6: Add ADIN1300 PHY fixup
Date: Mon, 5 Oct 2026 11:14:11 +0200 [thread overview]
Message-ID: <20261005091420.216137-1-florijan.plohl@norik.com> (raw)
From: Stefan Riedmueller <s.riedmueller@phytec.de>
The i.MX 6 requires a ref clock from the PHY when running in RGMII mode.
Since the clock output from the GP_CLK pin is disabled by default on the
ADIN1300 PHY we need a fixup to enable it.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Florijan Plohl <florijan.plohl@norik.com>
---
Changes in v2:
- Register the fixup once after the board specific if/else instead of
in every board branch
- Link to v1: https://lore.barebox.org/barebox/20261001104232.2616094-1-florijan.plohl@norik.com/
arch/arm/boards/phytec-som-imx6/board.c | 33 +++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index 7e6f61bc36..031d11d816 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -45,6 +45,9 @@
#define DA9062_BUCK4_CFG 0x9f
#define DA9062_BUCKx_MODE_SYNCHRONOUS (2 << 6)
+#define PHY_ID_ADIN1300 0x0283bc30
+#define ADIN_PHY_ID_MASK 0x0fffffff
+
static void phyflex_err006282_workaround(void)
{
/*
@@ -99,6 +102,33 @@ static int ksz8081_phy_fixup(struct phy_device *phydev)
return 0;
}
+static int adin1300_phy_fixup(struct phy_device *phydev)
+{
+ u16 val;
+ /*
+ * Enable 125 MHz PHY clock at GP_CLK pin to the ENET_REF_CLK pin
+ * of the i.MX 6
+ */
+
+ phy_write(phydev, 0x1c, 0x2109);
+ phy_write(phydev, 0x1b, 0x401);
+ phy_write(phydev, 0x10, 0xff1f);
+ phy_write(phydev, 0x11, 0x28);
+ phy_write(phydev, 0x10, 0xff3c);
+ phy_write(phydev, 0x11, 0x1);
+
+ /*
+ * Disable advertisement of 100BASE-TX and 1000BASE-T EEE capabilities
+ * by clearing EEE_100_ADV and EEE_1000_ADV bits in EEE_ADV (0x8001) reg.
+ */
+ phy_write(phydev, 0x10, 0x8001);
+ val = phy_read(phydev, 0x11);
+ val &= ~(BIT(1) | BIT(2));
+ phy_write(phydev, 0x11, 0x0);
+
+ return 0;
+}
+
static int phycore_da9062_setup_buck_mode(void)
{
struct i2c_adapter *adapter = NULL;
@@ -216,6 +246,9 @@ static int physom_imx6_probe(struct device *dev)
return -EINVAL;
}
+ phy_register_fixup_for_uid(PHY_ID_ADIN1300, ADIN_PHY_ID_MASK,
+ adin1300_phy_fixup);
+
switch (bootsource_get()) {
case BOOTSOURCE_MMC:
environment_path = basprintf("/chosen/environment-sd%d",
--
2.43.0
next reply other threads:[~2026-10-05 9:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-05 9:14 Florijan Plohl [this message]
2026-10-06 6:42 ` Sascha Hauer
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