From: "Sascha Hauer" <s.hauer@pengutronix.de>
To: "Florijan Plohl" <florijan.plohl@norik.com>
Cc: barebox@lists.infradead.org, upstream@lists.phytec.de
Subject: Re: [PATCH] ARM: dts: imx6: phycore: Fix pin settings for ADIN1300 PHY
Date: Thu, 01 Oct 2026 20:31:56 +0000 [thread overview]
Message-ID: <fd2880a1-c225-45b5-8a39-296b163c2d54@pengutronix.de> (raw)
In-Reply-To: <20261001104309.2616488-1-florijan.plohl@norik.com>
On 2026-10-01 12:43, Florijan Plohl wrote:
> From: Stefan Riedmueller <s.riedmueller@phytec.de>
>
> Change drive strength:
> - TXC 57 Ohm
> - TD0-3 76 Ohm
> - TX_CTL 76 Ohm
>
> Remove pull ups from following pins so the won't interfere with strap
> pin latching of the PHY:
> - ENET_TX_CLK
> - RXC
> - RD0-3
> - RX_CTL
>
> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
> Signed-off-by: Florijan Plohl <florijan.plohl@norik.com>
> ---
> arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 24 ++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
> index 60f7e2c14b..7199c416c8 100644
> --- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
> +++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
> @@ -79,6 +79,30 @@ pmic@58 {
> };
> };
>
> +&iomuxc {
> + pinctrl_enet: enetgrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b018
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b018
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b018
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b018
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b018
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x180b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x180b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x180b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x180b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x180b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x180b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x180b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
> + >;
> + };
> +};
Fine with me, so I applied it, but have you considered sending it for
kernel inclusion as well? Otherwise the values will be reverted back
under Linux when you don't start with the barebox device tree.
Sascha
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prev parent reply other threads:[~2026-10-01 20:33 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 10:43 Florijan Plohl
2026-10-01 20:30 ` Sascha Hauer
2026-10-01 20:31 ` Sascha Hauer [this message]
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