* [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start
@ 2026-10-01 6:52 Sascha Hauer
2026-10-01 6:54 ` Sascha Hauer
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Sascha Hauer @ 2026-10-01 6:52 UTC (permalink / raw)
To: Barebox List
.image_start and ._text only hold the zero-sized __image_start and
_text markers, so the location counter is still 0 when it reaches
the ALIGN(4) in front of ._text. The ALIGN was only meaningful while
PRE_IMAGE could place data of arbitrary size there. RISC-V copied the
sequence from ARM.
The PBL must start with its entry code: it is started from its first
address, the image size is taken as __image_end, and code copying the
image uses __image_start and _text interchangeably. Assert that
instead of silently relying on it.
Assisted-by: Claude:claude-opus-5-5
---
arch/arm/lib/pbl.lds.S | 3 ++-
arch/riscv/lib/pbl.lds.S | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
index c4abfc5989..2c96034c4e 100644
--- a/arch/arm/lib/pbl.lds.S
+++ b/arch/arm/lib/pbl.lds.S
@@ -40,7 +40,6 @@ SECTIONS
.image_start : { *(.__image_start) }
- . = ALIGN(4);
._text : { *(._text) }
.text :
{
@@ -152,4 +151,6 @@ SECTIONS
_barebox_image_size = __image_end;
_barebox_pbl_size = __bss_start;
+
+ ASSERT(_stext == __image_start, "PBL entry code must be at the image start")
}
diff --git a/arch/riscv/lib/pbl.lds.S b/arch/riscv/lib/pbl.lds.S
index 17cd61ff75..e580ec06f3 100644
--- a/arch/riscv/lib/pbl.lds.S
+++ b/arch/riscv/lib/pbl.lds.S
@@ -14,7 +14,6 @@ SECTIONS
.image_start : { *(.__image_start) }
- . = ALIGN(4);
._text : { *(._text) }
.text :
{
@@ -87,4 +86,6 @@ SECTIONS
_barebox_image_size = __image_end;
_barebox_pbl_size = __bss_start;
+
+ ASSERT(_stext == __image_start, "PBL entry code must be at the image start")
}
--
2.47.3
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start
2026-10-01 6:52 [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start Sascha Hauer
@ 2026-10-01 6:54 ` Sascha Hauer
2026-10-01 7:39 ` Marco Felsch
2026-10-01 20:22 ` Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2026-10-01 6:54 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Barebox List
On 2026-10-01 08:52, Sascha Hauer wrote:
> .image_start and ._text only hold the zero-sized __image_start and
> _text markers, so the location counter is still 0 when it reaches
> the ALIGN(4) in front of ._text. The ALIGN was only meaningful while
> PRE_IMAGE could place data of arbitrary size there. RISC-V copied the
> sequence from ARM.
>
> The PBL must start with its entry code: it is started from its first
> address, the image size is taken as __image_end, and code copying the
> image uses __image_start and _text interchangeably. Assert that
> instead of silently relying on it.
>
> Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> arch/arm/lib/pbl.lds.S | 3 ++-
> arch/riscv/lib/pbl.lds.S | 3 ++-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
> index c4abfc5989..2c96034c4e 100644
> --- a/arch/arm/lib/pbl.lds.S
> +++ b/arch/arm/lib/pbl.lds.S
> @@ -40,7 +40,6 @@ SECTIONS
>
> .image_start : { *(.__image_start) }
>
> - . = ALIGN(4);
> ._text : { *(._text) }
> .text :
> {
> @@ -152,4 +151,6 @@ SECTIONS
>
> _barebox_image_size = __image_end;
> _barebox_pbl_size = __bss_start;
> +
> + ASSERT(_stext == __image_start, "PBL entry code must be at the image start")
> }
> diff --git a/arch/riscv/lib/pbl.lds.S b/arch/riscv/lib/pbl.lds.S
> index 17cd61ff75..e580ec06f3 100644
> --- a/arch/riscv/lib/pbl.lds.S
> +++ b/arch/riscv/lib/pbl.lds.S
> @@ -14,7 +14,6 @@ SECTIONS
>
> .image_start : { *(.__image_start) }
>
> - . = ALIGN(4);
> ._text : { *(._text) }
> .text :
> {
> @@ -87,4 +86,6 @@ SECTIONS
>
> _barebox_image_size = __image_end;
> _barebox_pbl_size = __bss_start;
> +
> + ASSERT(_stext == __image_start, "PBL entry code must be at the image start")
> }
> --
> 2.47.3
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start
2026-10-01 6:52 [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start Sascha Hauer
2026-10-01 6:54 ` Sascha Hauer
@ 2026-10-01 7:39 ` Marco Felsch
2026-10-01 20:22 ` Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Marco Felsch @ 2026-10-01 7:39 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Barebox List
Hi Sascha,
On 26-10-01 08:52, Sascha Hauer wrote:
> .image_start and ._text only hold the zero-sized __image_start and
> _text markers, so the location counter is still 0 when it reaches
> the ALIGN(4) in front of ._text. The ALIGN was only meaningful while
> PRE_IMAGE could place data of arbitrary size there. RISC-V copied the
> sequence from ARM.
>
> The PBL must start with its entry code: it is started from its first
> address, the image size is taken as __image_end, and code copying the
> image uses __image_start and _text interchangeably. Assert that
> instead of silently relying on it.
>
> Assisted-by: Claude:claude-opus-5-5
The change is fine, but you missed your s-o-b.
Regards,
Marco
> ---
> arch/arm/lib/pbl.lds.S | 3 ++-
> arch/riscv/lib/pbl.lds.S | 3 ++-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
> index c4abfc5989..2c96034c4e 100644
> --- a/arch/arm/lib/pbl.lds.S
> +++ b/arch/arm/lib/pbl.lds.S
> @@ -40,7 +40,6 @@ SECTIONS
>
> .image_start : { *(.__image_start) }
>
> - . = ALIGN(4);
> ._text : { *(._text) }
> .text :
> {
> @@ -152,4 +151,6 @@ SECTIONS
>
> _barebox_image_size = __image_end;
> _barebox_pbl_size = __bss_start;
> +
> + ASSERT(_stext == __image_start, "PBL entry code must be at the image start")
> }
> diff --git a/arch/riscv/lib/pbl.lds.S b/arch/riscv/lib/pbl.lds.S
> index 17cd61ff75..e580ec06f3 100644
> --- a/arch/riscv/lib/pbl.lds.S
> +++ b/arch/riscv/lib/pbl.lds.S
> @@ -14,7 +14,6 @@ SECTIONS
>
> .image_start : { *(.__image_start) }
>
> - . = ALIGN(4);
> ._text : { *(._text) }
> .text :
> {
> @@ -87,4 +86,6 @@ SECTIONS
>
> _barebox_image_size = __image_end;
> _barebox_pbl_size = __bss_start;
> +
> + ASSERT(_stext == __image_start, "PBL entry code must be at the image start")
> }
> --
> 2.47.3
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start
2026-10-01 6:52 [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start Sascha Hauer
2026-10-01 6:54 ` Sascha Hauer
2026-10-01 7:39 ` Marco Felsch
@ 2026-10-01 20:22 ` Sascha Hauer
2 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2026-10-01 20:22 UTC (permalink / raw)
To: Barebox List, Sascha Hauer
On Thu, 01 Oct 2026 08:52:47 +0200, Sascha Hauer wrote:
> .image_start and ._text only hold the zero-sized __image_start and
> _text markers, so the location counter is still 0 when it reaches
> the ALIGN(4) in front of ._text. The ALIGN was only meaningful while
> PRE_IMAGE could place data of arbitrary size there. RISC-V copied the
> sequence from ARM.
>
> The PBL must start with its entry code: it is started from its first
> address, the image size is taken as __image_end, and code copying the
> image uses __image_start and _text interchangeably. Assert that
> instead of silently relying on it.
>
> [...]
Applied, thanks!
[1/1] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start
https://git.pengutronix.de/cgit/barebox/commit/?id=a2bae64125b0 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
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2026-10-01 6:52 [PATCH] ARM/RISC-V: pbl.lds: drop ALIGN before _text and assert entry at start Sascha Hauer
2026-10-01 6:54 ` Sascha Hauer
2026-10-01 7:39 ` Marco Felsch
2026-10-01 20:22 ` Sascha Hauer
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