* [PATCH 1/3] clk: imx28: Set gpmi clock to gpmi_ref
@ 2021-05-04 14:10 Sascha Hauer
2021-05-04 14:10 ` [PATCH 2/3] clk: imx28: propagate rate change to parents Sascha Hauer
2021-05-04 14:10 ` [PATCH 3/3] mtd: nand: mxs: Enable edo mode switching for i.MX28 Sascha Hauer
0 siblings, 2 replies; 3+ messages in thread
From: Sascha Hauer @ 2021-05-04 14:10 UTC (permalink / raw)
To: Barebox List
The GPMI is parented to ref_xtal (=24MHz) by default. Reparent it to
ref_gpmi to get reasonable NAND speed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/clk/mxs/clk-imx28.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index aa4ba99cd7..382021e49c 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -145,6 +145,7 @@ static int __init mx28_clocks_init(struct device_d *dev, void __iomem *regs)
clk_set_rate(clks[ssp2], 96000000);
clk_set_rate(clks[ssp3], 96000000);
clk_set_parent(clks[lcdif_sel], clks[ref_pix]);
+ clk_set_parent(clks[gpmi_sel], clks[ref_gpmi]);
if (dev->device_node) {
clk_data.clks = clks;
--
2.29.2
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^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 2/3] clk: imx28: propagate rate change to parents
2021-05-04 14:10 [PATCH 1/3] clk: imx28: Set gpmi clock to gpmi_ref Sascha Hauer
@ 2021-05-04 14:10 ` Sascha Hauer
2021-05-04 14:10 ` [PATCH 3/3] mtd: nand: mxs: Enable edo mode switching for i.MX28 Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2021-05-04 14:10 UTC (permalink / raw)
To: Barebox List
The gate clocks need to be able to set their parent's clock rates so
that drivers actually can change their clock rates. The same is done
in Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/clk/mxs/clk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h
index 60f2408cba..a93361a9ea 100644
--- a/drivers/clk/mxs/clk.h
+++ b/drivers/clk/mxs/clk.h
@@ -35,7 +35,7 @@ static inline struct clk *mxs_clk_fixed(const char *name, int rate)
static inline struct clk *mxs_clk_gate(const char *name,
const char *parent_name, void __iomem *reg, u8 shift)
{
- return clk_gate_inverted(name, parent_name, reg, shift, 0);
+ return clk_gate_inverted(name, parent_name, reg, shift, CLK_SET_RATE_PARENT);
}
static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
--
2.29.2
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^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 3/3] mtd: nand: mxs: Enable edo mode switching for i.MX28
2021-05-04 14:10 [PATCH 1/3] clk: imx28: Set gpmi clock to gpmi_ref Sascha Hauer
2021-05-04 14:10 ` [PATCH 2/3] clk: imx28: propagate rate change to parents Sascha Hauer
@ 2021-05-04 14:10 ` Sascha Hauer
1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2021-05-04 14:10 UTC (permalink / raw)
To: Barebox List
Without it we will never use the faster timing modes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/mtd/nand/nand_mxs.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index e4bad45a18..0540ba0216 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -2041,9 +2041,6 @@ static int mxs_nand_enable_edo_mode(struct mxs_nand_info *info)
uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {};
int ret, mode;
- if (!mxs_nand_is_imx6(info))
- return -ENODEV;
-
if (!chip->parameters.onfi)
return -ENOENT;
@@ -2186,6 +2183,7 @@ static int mxs_nand_probe(struct device_d *dev)
nand_info->dma_channel_base = 0;
} else {
nand_info->dma_channel_base = MXS_DMA_CHANNEL_AHB_APBH_GPMI0;
+ clk_set_rate(nand_info->clk, 22000000);
}
err = mxs_nand_alloc_buffers(nand_info);
--
2.29.2
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2021-05-04 14:10 [PATCH 1/3] clk: imx28: Set gpmi clock to gpmi_ref Sascha Hauer
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