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* [PATCH 1/4] watchdog: dw_wdt: Write counter restart register
@ 2021-06-10 13:06 Sascha Hauer
  2021-06-10 13:06 ` [PATCH 2/4] watchdog: dw_wdt: Detect if running initially Sascha Hauer
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Sascha Hauer @ 2021-06-10 13:06 UTC (permalink / raw)
  To: Barebox List

At least some variants of the dwc watchdog controllers need the
value 0x76 written to the counter restart register to actually
take the value written to the Timeout range register. Happened
on Rockchip RK3568, without this the watchdog immediately resets
the system.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/watchdog/dw_wdt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
index 17771c7126..bc5d4a889a 100644
--- a/drivers/watchdog/dw_wdt.c
+++ b/drivers/watchdog/dw_wdt.c
@@ -111,6 +111,9 @@ static int dw_wdt_set_timeout(struct watchdog *wdd, unsigned int top_s)
 	writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
 	       dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
 
+	writel(WDOG_COUNTER_RESTART_KICK_VALUE,
+	       dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET);
+
 	dw_wdt_start(wdd);
 
 	return 0;
-- 
2.29.2


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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2021-06-10 13:08 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-10 13:06 [PATCH 1/4] watchdog: dw_wdt: Write counter restart register Sascha Hauer
2021-06-10 13:06 ` [PATCH 2/4] watchdog: dw_wdt: Detect if running initially Sascha Hauer
2021-06-10 13:06 ` [PATCH 3/4] watchdog: dw_wdt: set maximum timeout Sascha Hauer
2021-06-10 13:06 ` [PATCH 4/4] watchdog: dw_wdt: denote message to debug level Sascha Hauer

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