[PATCH 09/24] reset: stm32: drop stm32mp1_reset_ops indirection

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

The driver used to support both STM32 MCUs and the STM32MP1. STM32 MCU
support is now handled by the reset-simple driver, so the indirection to
support both is no longer necessary. Remove it and simplify the code.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/reset/reset-stm32.c | 97 ++++++++++++++-----------------------
 1 file changed, 37 insertions(+), 60 deletions(-)

diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c
index 186b2a8bc654..e625ba27fff6 100644
--- a/drivers/reset/reset-stm32.c
+++ b/drivers/reset/reset-stm32.c
@@ -44,13 +44,6 @@ struct stm32_reset {
 	void __iomem *base;
 	struct reset_controller_dev rcdev;
 	struct restart_handler restart;
-	const struct stm32_reset_ops *ops;
-};
-
-struct stm32_reset_ops {
-	void (*reset)(void __iomem *reg, unsigned offset, bool assert);
-	void __noreturn (*sys_reset)(struct restart_handler *rst);
-	const struct stm32_reset_reason *reset_reasons;
 };
 
 static struct stm32_reset *to_stm32_reset(struct reset_controller_dev *rcdev)
@@ -58,14 +51,6 @@ static struct stm32_reset *to_stm32_reset(struct reset_controller_dev *rcdev)
 	return container_of(rcdev, struct stm32_reset, rcdev);
 }
 
-static void stm32mp_reset(void __iomem *reg, unsigned offset, bool assert)
-{
-	if (!assert)
-		reg += RCC_CL;
-
-	writel(BIT(offset), reg);
-}
-
 static u32 stm32_reset_status(struct stm32_reset *priv, unsigned long bank)
 {
 	return readl(priv->base + bank);
@@ -75,10 +60,38 @@ static void stm32_reset(struct stm32_reset *priv, unsigned long id, bool assert)
 {
 	int bank = (id / 32) * 4;
 	int offset = id % 32;
+	void __iomem *reg = priv->base + bank;
 
-	priv->ops->reset(priv->base + bank, offset, assert);
+	if (!assert)
+		reg += RCC_CL;
+
+	writel(BIT(offset), reg);
 }
 
+static void __noreturn stm32mp_rcc_restart_handler(struct restart_handler *rst)
+{
+	struct stm32_reset *priv = container_of(rst, struct stm32_reset, restart);
+
+	stm32_reset(priv, RCC_MP_GRSTCSETR * BITS_PER_BYTE, true);
+
+	mdelay(1000);
+	hang();
+}
+
+static const struct stm32_reset_reason stm32mp_reset_reasons[] = {
+	{ STM32MP_RCC_RSTF_POR,		RESET_POR, 0 },
+	{ STM32MP_RCC_RSTF_BOR,		RESET_BROWNOUT, 0 },
+	{ STM32MP_RCC_RSTF_STDBY,	RESET_WKE, 0 },
+	{ STM32MP_RCC_RSTF_CSTDBY,	RESET_WKE, 1 },
+	{ STM32MP_RCC_RSTF_MPSYS,	RESET_RST, 2 },
+	{ STM32MP_RCC_RSTF_MPUP0,	RESET_RST, 0 },
+	{ STM32MP_RCC_RSTF_MPUP1,	RESET_RST, 1 },
+	{ STM32MP_RCC_RSTF_IWDG1,	RESET_WDG, 0 },
+	{ STM32MP_RCC_RSTF_IWDG2,	RESET_WDG, 1 },
+	{ STM32MP_RCC_RSTF_PAD,		RESET_EXT, 1 },
+	{ /* sentinel */ }
+};
+
 static void stm32_set_reset_reason(struct stm32_reset *priv,
 				   const struct stm32_reset_reason *reasons)
 {
@@ -128,9 +141,6 @@ static int stm32_reset_probe(struct device_d *dev)
 	int ret;
 
 	priv = xzalloc(sizeof(*priv));
-	ret = dev_get_drvdata(dev, (const void **)&priv->ops);
-	if (ret)
-		return ret;
 
 	iores = dev_request_mem_resource(dev, 0);
 	if (IS_ERR(iores))
@@ -141,54 +151,21 @@ static int stm32_reset_probe(struct device_d *dev)
 	priv->rcdev.ops = &stm32_reset_ops;
 	priv->rcdev.of_node = dev->device_node;
 
-	if (priv->ops->sys_reset) {
-		priv->restart.name = "stm32-rcc";
-		priv->restart.restart = priv->ops->sys_reset;
-		priv->restart.priority = 200;
+	priv->restart.name = "stm32-rcc";
+	priv->restart.restart = stm32mp_rcc_restart_handler;
+	priv->restart.priority = 200;
 
-		ret = restart_handler_register(&priv->restart);
-		if (ret)
-			dev_warn(dev, "Cannot register restart handler\n");
-	}
+	ret = restart_handler_register(&priv->restart);
+	if (ret)
+		dev_warn(dev, "Cannot register restart handler\n");
 
-	if (priv->ops->reset_reasons)
-		stm32_set_reset_reason(priv, priv->ops->reset_reasons);
+	stm32_set_reset_reason(priv, stm32mp_reset_reasons);
 
 	return reset_controller_register(&priv->rcdev);
 }
 
-static void __noreturn stm32mp_rcc_restart_handler(struct restart_handler *rst)
-{
-	struct stm32_reset *priv = container_of(rst, struct stm32_reset, restart);
-
-	stm32_reset(priv, RCC_MP_GRSTCSETR * BITS_PER_BYTE, true);
-
-	mdelay(1000);
-	hang();
-}
-
-static const struct stm32_reset_reason stm32mp_reset_reasons[] = {
-	{ STM32MP_RCC_RSTF_POR,		RESET_POR, 0 },
-	{ STM32MP_RCC_RSTF_BOR,		RESET_BROWNOUT, 0 },
-	{ STM32MP_RCC_RSTF_STDBY,	RESET_WKE, 0 },
-	{ STM32MP_RCC_RSTF_CSTDBY,	RESET_WKE, 1 },
-	{ STM32MP_RCC_RSTF_MPSYS,	RESET_RST, 2 },
-	{ STM32MP_RCC_RSTF_MPUP0,	RESET_RST, 0 },
-	{ STM32MP_RCC_RSTF_MPUP1,	RESET_RST, 1 },
-	{ STM32MP_RCC_RSTF_IWDG1,	RESET_WDG, 0 },
-	{ STM32MP_RCC_RSTF_IWDG2,	RESET_WDG, 1 },
-	{ STM32MP_RCC_RSTF_PAD,		RESET_EXT, 1 },
-	{ /* sentinel */ }
-};
-
-static const struct stm32_reset_ops stm32mp1_reset_ops = {
-	.reset = stm32mp_reset,
-	.sys_reset = stm32mp_rcc_restart_handler,
-	.reset_reasons = stm32mp_reset_reasons,
-};
-
 static const struct of_device_id stm32_rcc_reset_dt_ids[] = {
-	{ .compatible = "st,stm32mp1-rcc", .data = &stm32mp1_reset_ops },
+	{ .compatible = "st,stm32mp1-rcc" },
 	{ /* sentinel */ },
 };
 
-- 
2.30.2


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