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From: Sam Ravnborg <sam@ravnborg.org>
To: barebox@lists.infradead.org
Cc: Sam Ravnborg <sam@ravnborg.org>
Subject: [PATCH v1 7/8] ARM: at91: Add initialize function to sdramc
Date: Sun, 15 May 2022 21:38:06 +0200	[thread overview]
Message-ID: <20220515193807.354903-8-sam@ravnborg.org> (raw)
In-Reply-To: <20220515193807.354903-1-sam@ravnborg.org>

Port the sdramc initialize function from at91bootstrap.
It is needed from lowlevel code and is a replacement for the
sdramc init code in at91sam926x_board_init.h

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
 arch/arm/mach-at91/Makefile                   |  2 +-
 arch/arm/mach-at91/at91sam9_sdramc_ll.c       | 67 +++++++++++++++++++
 .../mach-at91/include/mach/at91sam9_sdramc.h  | 12 ++++
 3 files changed, 80 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-at91/at91sam9_sdramc_ll.c

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 56c2a3170..390d49d03 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 obj-y += setup.o aic.o
-lwl-y += at91_pmc_ll.o ddramc_ll.o matrix.o
+lwl-y += at91_pmc_ll.o ddramc_ll.o at91sam9_sdramc_ll.o matrix.o
 lwl-$(CONFIG_CLOCKSOURCE_ATMEL_PIT) += early_udelay.o
 
 ifeq ($(CONFIG_COMMON_CLK_OF_PROVIDER),)
diff --git a/arch/arm/mach-at91/at91sam9_sdramc_ll.c b/arch/arm/mach-at91/at91sam9_sdramc_ll.c
new file mode 100644
index 000000000..b43654364
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9_sdramc_ll.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: BSD-1-Clause
+/*
+ * Copyright (c) 2006, Atmel Corporation
+ */
+#include <mach/at91sam9_sdramc.h>
+
+static inline void sdramc_wr(const struct at91sam9_sdramc_config *config,
+			     unsigned int offset,
+			     const unsigned int value)
+{
+	writel(value, config->sdramc + offset);
+}
+
+int at91sam9_sdramc_initialize(const struct at91sam9_sdramc_config *config,
+			       unsigned int sdram_address)
+{
+	unsigned int i;
+
+	/* Step#1 SDRAM feature must be in the configuration register */
+	sdramc_wr(config, AT91_SDRAMC_CR, config->cr);
+
+	/* Step#2 For mobile SDRAM, temperature-compensated self refresh(TCSR),... */
+
+	/* Step#3 The SDRAM memory type must be set in the Memory Device Register */
+	sdramc_wr(config, AT91_SDRAMC_MDR, config->mdr);
+
+	/* Step#4 The minimum pause of 200 us is provided to precede any single toggle */
+	for (i = 0; i < 1000; i++) ;
+
+	/* Step#5 A NOP command is issued to the SDRAM devices */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_NOP);
+	writel(0x00000000, sdram_address);
+
+	/* Step#6 An All Banks Precharge command is issued to the SDRAM devices  */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_PRECHARGE);
+	writel(0x00000000, sdram_address);
+
+	for (i = 0; i < 10000; i++) ;
+
+	/* Step#7 Eight auto-refresh cycles are provided */
+	for (i = 0; i < 8; i++) {
+		sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_REFRESH);
+		writel(0x00000001 + i, sdram_address + 4 + 4 * i);
+	}
+
+	/*  Pause cycles */
+	for (i = 0; i < 1000; i++) ;
+
+	/* Step#8 A Mode Register set (MRS) cyscle is issued to program the SDRAM parameters(TCSR, PASR, DS) */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_LMR);
+	writel(0xcafedede, sdram_address + 0x24);
+
+	/*  Pause cycles */
+	for (i = 0; i < 1000; i++) ;
+
+	/* Step#9 For mobile SDRAM initialization, an Extended Mode Register set cycle is issued to ... */
+
+	/* Step#10 The application must go into Normal Mode, setting Mode to 0 in the Mode Register
+	   and perform a write access at any location in the SDRAM. */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_NORMAL);	// Set Normal mode
+	writel(0x00000000, sdram_address);	// Perform Normal mode
+
+	/* Step#11 Write the refresh rate into the count field in the SDRAMC Refresh Timer Rgister. */
+	sdramc_wr(config, AT91_SDRAMC_TR, config->tr);
+
+	return 0;
+}
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index fe76f60b0..0e05387aa 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -181,6 +181,18 @@
 #include <mach/at91sam9261.h>
 #include <mach/at91sam9263.h>
 
+struct at91sam9_sdramc_config {
+	void __iomem *sdramc;
+	unsigned int mr;
+	unsigned int tr;
+	unsigned int cr;
+	unsigned int lpr;
+	unsigned int mdr;
+};
+
+int at91sam9_sdramc_initialize(const struct at91sam9_sdramc_config *config,
+			       unsigned int sdram_address);
+
 static inline u32 at91_get_sdram_size(void *base)
 {
 	u32 val;
-- 
2.34.1


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  parent reply	other threads:[~2022-05-15 19:40 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-15 19:37 [RFC PATCH v1 0/8] ARM: at91: Add pbl support to skov-arm9cpu Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 1/8] pwm: atmel: Fix build and update Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 2/8] ARM: at91: Provide at91_mux_pio_pin for use in lowlevel Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 3/8] ARM: at91: Add at91sam9 xload_mmc for PBL use Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 4/8] ARM: at91: Add extra register definitions Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 5/8] ARM: at91: Add lowlevel helpers for at91sam9263 Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 6/8] ARM: at91: Make sdramc.h useable in multi image builds Sam Ravnborg
2022-05-15 19:38 ` Sam Ravnborg [this message]
2022-05-16 10:47   ` [PATCH v1 7/8] ARM: at91: Add initialize function to sdramc Ahmad Fatoum
2022-05-16 15:13     ` Sam Ravnborg
2022-05-15 19:38 ` [PATCH v1 8/8] ARM: at91: Add xload support to skov-arm9cpu Sam Ravnborg
2022-05-16 11:15   ` Ahmad Fatoum
2022-05-16 15:28     ` Sam Ravnborg
2022-05-16 15:35       ` Ahmad Fatoum
2022-05-16 15:47         ` Ahmad Fatoum
2022-05-30  7:20 ` [RFC PATCH v1 0/8] ARM: at91: Add pbl " Sam Ravnborg
2022-06-28 19:23 ` Sam Ravnborg
2022-06-28 21:12   ` Ahmad Fatoum
2022-06-28 21:18     ` Sam Ravnborg
2022-06-28 21:20       ` Ahmad Fatoum

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