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From: Marco Felsch <m.felsch@pengutronix.de>
To: Sascha Hauer <sha@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 1/2] ddr: imx8m: write fsp_table entry automatically
Date: Thu, 22 Sep 2022 11:54:21 +0200	[thread overview]
Message-ID: <20220922095421.r4im3dbbmrz4ats2@pengutronix.de> (raw)
In-Reply-To: <20220922095156.GL986@pengutronix.de>

On 22-09-22, Sascha Hauer wrote:
> On Wed, Sep 21, 2022 at 07:20:51PM +0200, Marco Felsch wrote:
> > Currently the fsp_table must be set manually within the 'struct
> > dram_timing_info'. Since the 'struct fsp_msg' already has all
> > information needed for the fsp_table we can use it to set it
> > automatically. This approach is less error-prone and avoids information
> > duplication.
> 
> Is this really worth it? The whole dram timing code comes directly from
> the NXP DRAM tools, so the fsp_table comes back with each new board or
> with a DRAM timing update.

I had a problem with the missing fsp_table for the MX8MM-EVK and a buggy
TF-A. Therefore I would say yes, since it is not guaranteed that the
fsp_table is existing.

Regards,
  Marco



  reply	other threads:[~2022-09-22 10:11 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-21 17:20 Marco Felsch
2022-09-21 17:20 ` [PATCH 2/2] ARM: i.MX8M: remove fsp_table entry Marco Felsch
2022-09-22  9:51 ` [PATCH 1/2] ddr: imx8m: write fsp_table entry automatically Sascha Hauer
2022-09-22  9:54   ` Marco Felsch [this message]
2022-09-26  6:01 ` Sascha Hauer

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