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* [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines
@ 2022-10-17  7:07 Ahmad Fatoum
  2022-10-17  7:07 ` [PATCH 2/2] ARM: i.MX7: don't hardcode UART1 in imx7_early_setup_uart_clock Ahmad Fatoum
  2022-10-18  9:17 ` [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines Sascha Hauer
  0 siblings, 2 replies; 3+ messages in thread
From: Ahmad Fatoum @ 2022-10-17  7:07 UTC (permalink / raw)
  To: barebox; +Cc: Ahmad Fatoum

We currently have the clock defines for 1-3, but lack 4-6.
Add generic defines that can be used for all of 1-6 and
start using them in the header.

The old defines are not used outside the file, so drop them.
Out-of-tree users can just move the number into the parenthesis:

	IMX7_CCM_CCGR_UART1 -> IMX7_CCM_CCGR_UART(1)
	IMX7_UART1_CLK_ROOT ->  IMX7_UART_CLK_ROOT(1)

Consulting the data sheet also showed that IMX7_UART_CLK_ROOT__OSC_24M
is the same value for all UARTs, so we omit the argument there.

No functional change.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 .../arm/mach-imx/include/mach/imx7-ccm-regs.h | 25 ++++++++-----------
 1 file changed, 10 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
index aecf9a26d017..89a41156cd6a 100644
--- a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
@@ -3,24 +3,17 @@
 #ifndef __MACH_IMX7_CCM_REGS_H__
 #define __MACH_IMX7_CCM_REGS_H__
 
-#define IMX7_CCM_CCGR_UART1		148
-#define IMX7_CCM_CCGR_UART2		149
-#define IMX7_CCM_CCGR_UART3		150
-
 #define IMX7_CLOCK_ROOT_INDEX(x)	(((x) - 0x8000) / 128)
 
 /*
  * Taken from "Table 5-11. Clock Root Table" from i.MX7 Dual Processor
  * Reference Manual
  */
-#define IMX7_UART1_CLK_ROOT		IMX7_CLOCK_ROOT_INDEX(0xaf80)
-#define IMX7_UART1_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
-
-#define IMX7_UART2_CLK_ROOT		IMX7_CLOCK_ROOT_INDEX(0xb000)
-#define IMX7_UART2_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
 
-#define IMX7_UART3_CLK_ROOT		IMX7_CLOCK_ROOT_INDEX(0xb080)
-#define IMX7_UART3_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
+/* 1 <= n <= 6 */
+#define IMX7_CCM_CCGR_UART(n)		(148 + (n) - 1)
+#define IMX7_UART_CLK_ROOT(n)		IMX7_CLOCK_ROOT_INDEX(0xaf80 + (n - 1) * 0x80)
+#define IMX7_UART_CLK_ROOT__OSC_24M	IMX7_CCM_TARGET_ROOTn_MUX(0b000)
 
 /* 0 <= n <= 190 */
 #define IMX7_CCM_CCGRn_SET(n)	(0x4004 + 16 * (n))
@@ -39,16 +32,18 @@
 #define IMX7_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n)	IMX7_CCM_CCGR_SETTINGn(n, 0b10)
 #define IMX7_CCM_CCGR_SETTINGn_NEEDED(n)		IMX7_CCM_CCGR_SETTINGn(n, 0b11)
 
+/* UART counting starts for 1, like in the datasheet/dt-bindings */
+
 static inline void imx7_early_setup_uart_clock(void)
 {
 	void __iomem *ccm   = IOMEM(MX7_CCM_BASE_ADDR);
 
 	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART1));
-	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART1_CLK_ROOT__OSC_24M,
-	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART1_CLK_ROOT));
+	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART(1)));
+	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART_CLK_ROOT__OSC_24M,
+	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART_CLK_ROOT(1)));
 	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART1));
+	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART(1)));
 }
 
 #endif
-- 
2.30.2




^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH 2/2] ARM: i.MX7: don't hardcode UART1 in imx7_early_setup_uart_clock
  2022-10-17  7:07 [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines Ahmad Fatoum
@ 2022-10-17  7:07 ` Ahmad Fatoum
  2022-10-18  9:17 ` [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Ahmad Fatoum @ 2022-10-17  7:07 UTC (permalink / raw)
  To: barebox; +Cc: Ahmad Fatoum

imx7_early_setup_uart_clock() has a very generic sounding name, but so
far only set up clocks for UART1. This can lead board code authors
astray that intend to user a different UART for DEBUG_LL.

This issue affects board code for kamstrup-mx7-concentrator, meerkat96
and zii-imx7d-dev, which use UART4, UART6 and UART2 respectively.

As I don't have this boards available to test and clock changes may have
adverse effect elsewhere, we have all existing users setup UART1 as
before, but note with a comment that this may not be the original
author's intention.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/arm/boards/ac-sxb/lowlevel.c                |  2 +-
 arch/arm/boards/freescale-mx7-sabresd/lowlevel.c |  2 +-
 .../boards/kamstrup-mx7-concentrator/lowlevel.c  |  3 ++-
 arch/arm/boards/meerkat96/lowlevel.c             |  3 ++-
 arch/arm/boards/zii-imx7d-dev/lowlevel.c         |  3 ++-
 arch/arm/mach-imx/include/mach/imx7-ccm-regs.h   | 16 ++++++++++++----
 6 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boards/ac-sxb/lowlevel.c b/arch/arm/boards/ac-sxb/lowlevel.c
index a910555f9bd7..a26454968304 100644
--- a/arch/arm/boards/ac-sxb/lowlevel.c
+++ b/arch/arm/boards/ac-sxb/lowlevel.c
@@ -93,7 +93,7 @@ extern char __dtb_z_ac_sxb_start[];
 
 static inline void setup_uart(void)
 {
-	imx7_early_setup_uart_clock();
+	imx7_early_setup_uart_clock(1);
 
 	imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX);
 
diff --git a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
index a8733d62091f..6d393bf2b10e 100644
--- a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
@@ -17,7 +17,7 @@ extern char __dtb_imx7d_sdb_start[];
 
 static inline void setup_uart(void)
 {
-	imx7_early_setup_uart_clock();
+	imx7_early_setup_uart_clock(1);
 
 	imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX);
 
diff --git a/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c b/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c
index 4a9eae80d153..511f01757c46 100644
--- a/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c
+++ b/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c
@@ -17,7 +17,8 @@ extern char __dtb_z_imx7d_flex_concentrator_mfg_start[];
 
 static inline void setup_uart(void)
 {
-	imx7_early_setup_uart_clock();
+	/* FIXME: Below UART4 is muxed, not UART1 */
+	imx7_early_setup_uart_clock(1);
 
 	imx7_setup_pad(MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX);
 
diff --git a/arch/arm/boards/meerkat96/lowlevel.c b/arch/arm/boards/meerkat96/lowlevel.c
index 1c9baeacfb2a..e65726ef1c27 100644
--- a/arch/arm/boards/meerkat96/lowlevel.c
+++ b/arch/arm/boards/meerkat96/lowlevel.c
@@ -14,7 +14,8 @@ extern char __dtb_z_imx7d_meerkat96_start[];
 
 static void setup_uart(void)
 {
-	imx7_early_setup_uart_clock();
+	/* FIXME: Below UART6 is muxed, not UART1 */
+	imx7_early_setup_uart_clock(1);
 	imx7_setup_pad(MX7D_PAD_SD1_WP__UART6_DCE_TX);
 	imx7_uart_setup_ll();
 	putc_ll('>');
diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c
index 7579a2a8a050..0e316b602436 100644
--- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c
+++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c
@@ -23,7 +23,8 @@ extern char __dtb_z_imx7d_zii_rmu2_start[];
 
 static inline void setup_uart(void)
 {
-	imx7_early_setup_uart_clock();
+	/* FIXME: Below UART2 is muxed, not UART1 */
+	imx7_early_setup_uart_clock(1);
 
 	imx7_setup_pad(MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX);
 
diff --git a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
index 89a41156cd6a..96fad868fa30 100644
--- a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
@@ -3,6 +3,9 @@
 #ifndef __MACH_IMX7_CCM_REGS_H__
 #define __MACH_IMX7_CCM_REGS_H__
 
+#include <io.h>
+#include <linux/build_bug.h>
+
 #define IMX7_CLOCK_ROOT_INDEX(x)	(((x) - 0x8000) / 128)
 
 /*
@@ -34,16 +37,21 @@
 
 /* UART counting starts for 1, like in the datasheet/dt-bindings */
 
-static inline void imx7_early_setup_uart_clock(void)
+static inline void __imx7_early_setup_uart_clock(int uart)
 {
 	void __iomem *ccm   = IOMEM(MX7_CCM_BASE_ADDR);
 
 	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART(1)));
+	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART(uart)));
 	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART_CLK_ROOT__OSC_24M,
-	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART_CLK_ROOT(1)));
+	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART_CLK_ROOT(uart)));
 	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART(1)));
+	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART(uart)));
 }
 
+#define imx7_early_setup_uart_clock(uart) do {	\
+	static_assert(1 <= (uart) && (uart) <= 6, "ID out of UART1-6 range"); \
+	__imx7_early_setup_uart_clock(uart); \
+} while (0)
+
 #endif
-- 
2.30.2




^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines
  2022-10-17  7:07 [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines Ahmad Fatoum
  2022-10-17  7:07 ` [PATCH 2/2] ARM: i.MX7: don't hardcode UART1 in imx7_early_setup_uart_clock Ahmad Fatoum
@ 2022-10-18  9:17 ` Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2022-10-18  9:17 UTC (permalink / raw)
  To: Ahmad Fatoum; +Cc: barebox

On Mon, Oct 17, 2022 at 09:07:01AM +0200, Ahmad Fatoum wrote:
> We currently have the clock defines for 1-3, but lack 4-6.
> Add generic defines that can be used for all of 1-6 and
> start using them in the header.
> 
> The old defines are not used outside the file, so drop them.
> Out-of-tree users can just move the number into the parenthesis:
> 
> 	IMX7_CCM_CCGR_UART1 -> IMX7_CCM_CCGR_UART(1)
> 	IMX7_UART1_CLK_ROOT ->  IMX7_UART_CLK_ROOT(1)
> 
> Consulting the data sheet also showed that IMX7_UART_CLK_ROOT__OSC_24M
> is the same value for all UARTs, so we omit the argument there.
> 
> No functional change.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  .../arm/mach-imx/include/mach/imx7-ccm-regs.h | 25 ++++++++-----------
>  1 file changed, 10 insertions(+), 15 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
> index aecf9a26d017..89a41156cd6a 100644
> --- a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
> +++ b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
> @@ -3,24 +3,17 @@
>  #ifndef __MACH_IMX7_CCM_REGS_H__
>  #define __MACH_IMX7_CCM_REGS_H__
>  
> -#define IMX7_CCM_CCGR_UART1		148
> -#define IMX7_CCM_CCGR_UART2		149
> -#define IMX7_CCM_CCGR_UART3		150
> -
>  #define IMX7_CLOCK_ROOT_INDEX(x)	(((x) - 0x8000) / 128)
>  
>  /*
>   * Taken from "Table 5-11. Clock Root Table" from i.MX7 Dual Processor
>   * Reference Manual
>   */
> -#define IMX7_UART1_CLK_ROOT		IMX7_CLOCK_ROOT_INDEX(0xaf80)
> -#define IMX7_UART1_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
> -
> -#define IMX7_UART2_CLK_ROOT		IMX7_CLOCK_ROOT_INDEX(0xb000)
> -#define IMX7_UART2_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
>  
> -#define IMX7_UART3_CLK_ROOT		IMX7_CLOCK_ROOT_INDEX(0xb080)
> -#define IMX7_UART3_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
> +/* 1 <= n <= 6 */
> +#define IMX7_CCM_CCGR_UART(n)		(148 + (n) - 1)
> +#define IMX7_UART_CLK_ROOT(n)		IMX7_CLOCK_ROOT_INDEX(0xaf80 + (n - 1) * 0x80)
> +#define IMX7_UART_CLK_ROOT__OSC_24M	IMX7_CCM_TARGET_ROOTn_MUX(0b000)
>  
>  /* 0 <= n <= 190 */
>  #define IMX7_CCM_CCGRn_SET(n)	(0x4004 + 16 * (n))
> @@ -39,16 +32,18 @@
>  #define IMX7_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n)	IMX7_CCM_CCGR_SETTINGn(n, 0b10)
>  #define IMX7_CCM_CCGR_SETTINGn_NEEDED(n)		IMX7_CCM_CCGR_SETTINGn(n, 0b11)
>  
> +/* UART counting starts for 1, like in the datasheet/dt-bindings */
> +
>  static inline void imx7_early_setup_uart_clock(void)
>  {
>  	void __iomem *ccm   = IOMEM(MX7_CCM_BASE_ADDR);
>  
>  	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
> -	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART1));
> -	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART1_CLK_ROOT__OSC_24M,
> -	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART1_CLK_ROOT));
> +	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART(1)));
> +	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART_CLK_ROOT__OSC_24M,
> +	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART_CLK_ROOT(1)));
>  	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
> -	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART1));
> +	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART(1)));
>  }
>  
>  #endif
> -- 
> 2.30.2
> 
> 
> 

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2022-10-18  9:18 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2022-10-17  7:07 [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines Ahmad Fatoum
2022-10-17  7:07 ` [PATCH 2/2] ARM: i.MX7: don't hardcode UART1 in imx7_early_setup_uart_clock Ahmad Fatoum
2022-10-18  9:17 ` [PATCH 1/2] ARM: i.MX7: replace hardcoded UART clocking defines Sascha Hauer

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