[PATCH] net: designware: eqos: implement set_promisc callback

[PATCH] net: designware: eqos: implement set_promisc callback

[Ahmad Fatoum]

A STM32MP1 platform using a KSZ switch with barebox' DSA
framework now throws a warning:

  WARNING: ksz9477-spi ksz9563@00: Failed to set promisc mode.
  Using different eth addresses may not work. error 95

DSA worked correctly though and the switch ports had their own
MAC addresses different from the CPU's mac address. Frame
ingress and egress indeed occurs with the switch port's MAC address.

Nevertheless, it's a good idea to set the promiscuous bit, so do this
now, if only to silence the warning.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
@Oleksij, do you have an idea why this worked before?
---
 drivers/net/designware_eqos.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/net/designware_eqos.c b/drivers/net/designware_eqos.c
index c255d74eff5a..ee5a10a007e9 100644
--- a/drivers/net/designware_eqos.c
+++ b/drivers/net/designware_eqos.c
@@ -26,7 +26,8 @@
 struct eqos_mac_regs {
 	u32 config;				/* 0x000 */
 	u32 ext_config;				/* 0x004 */
-	u32 unused_004[(0x070 - 0x008) / 4];	/* 0x008 */
+	u32 packet_filter;			/* 0x008 */
+	u32 unused_004[(0x070 - 0x00C) / 4];	/* 0x00C */
 	u32 q0_tx_flow_ctrl;			/* 0x070 */
 	u32 unused_070[(0x090 - 0x074) / 4];	/* 0x074 */
 	u32 rx_flow_ctrl;			/* 0x090 */
@@ -62,6 +63,9 @@ struct eqos_mac_regs {
 #define EQOS_MAC_CONFIGURATION_TE			BIT(1)
 #define EQOS_MAC_CONFIGURATION_RE			BIT(0)
 
+#define EQOS_MAC_PACKET_FILTER_PR			BIT(0)	/* Promiscuous mode */
+#define EQOS_MAC_PACKET_FILTER_PCF			BIT(7)	/* Pass Control Frames */
+
 #define EQOS_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT		16
 #define EQOS_MAC_Q0_TX_FLOW_CTRL_PT_MASK		0xffff
 #define EQOS_MAC_Q0_TX_FLOW_CTRL_TFE			BIT(1)
@@ -357,6 +361,21 @@ int eqos_set_ethaddr(struct eth_device *edev, const unsigned char *mac)
 	return 0;
 }
 
+static int eqos_set_promisc(struct eth_device *edev, bool enable)
+{
+	struct eqos *eqos = edev->priv;
+	u32 mask;
+
+	mask = EQOS_MAC_PACKET_FILTER_PR | EQOS_MAC_PACKET_FILTER_PCF;
+
+	if (enable)
+		setbits_le32(&eqos->mac_regs->packet_filter, mask);
+	else
+		clrbits_le32(&eqos->mac_regs->packet_filter, mask);
+
+	return 0;
+}
+
 /* Get PHY out of power saving mode.  If this is needed elsewhere then
  * consider making it part of phy-core and adding a resume method to
  * the phy device ops.  */
@@ -856,6 +875,7 @@ int eqos_probe(struct device *dev, const struct eqos_ops *ops, void *priv)
 	edev->halt = eqos_stop;
 	edev->get_ethaddr = ops->get_ethaddr;
 	edev->set_ethaddr = ops->set_ethaddr;
+	edev->set_promisc = eqos_set_promisc;
 
 	miibus = &eqos->miibus;
 	miibus->parent = edev->parent;
-- 
2.30.2