[PATCH v3 1/3] ARM: i.MX8M: esdctl: use common compatible to detect i.MX8MQ/MM/MP DDRC

[PATCH v3 1/3] ARM: i.MX8M: esdctl: use common compatible to detect i.MX8MQ/MM/MP DDRC

[Lucas Stach]

All i.MX8M* DDRC nodes are compatible to "fsl,imx8m-ddrc". As the memory
size detection works the same on most of them, with the only exception
being the i.MX8MN, which only has a 16bit data bus, there is no need to
match the more specific compatibles for i.MX8MQ/MM/MP.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
---
 arch/arm/mach-imx/esdctl.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index a704250297bb..29e992933421 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -652,7 +652,7 @@ static __maybe_unused struct imx_esdctl_data vf610_data = {
 	.add_mem = vf610_ddrmc_add_mem,
 };
 
-static __maybe_unused struct imx_esdctl_data imx8mq_data = {
+static __maybe_unused struct imx_esdctl_data imx8m_data = {
 	.base0 = MX8M_DDR_CSD1_BASE_ADDR,
 	.add_mem = imx8m_ddrc_add_mem,
 };
@@ -732,14 +732,11 @@ static __maybe_unused struct of_device_id imx_esdctl_dt_ids[] = {
 		.compatible = "fsl,vf610-ddrmc",
 		.data = &vf610_data
 	}, {
-		.compatible = "fsl,imx8mm-ddrc",
-		.data = &imx8mq_data
+		.compatible = "fsl,imx8m-ddrc",
+		.data = &imx8m_data
 	}, {
 		.compatible = "fsl,imx8mn-ddrc",
 		.data = &imx8mn_data
-	}, {
-		.compatible = "fsl,imx8mq-ddrc",
-		.data = &imx8mq_data
 	}, {
 		.compatible = "fsl,imx7d-ddrc",
 		.data = &imx7d_data
-- 
2.39.1

[PATCH v3 2/3] ARM: dts: i.MX8MP: add DDRC compatibles

[Lucas Stach]

The upstream DT currently only provides the Synopsis core compatible
for the DDRC node. Extend this with more machine specific compatibles
to allow our memory size detection to work.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
---
 arch/arm/dts/imx8mp.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
index 5da79f13d339..778e84318ce7 100644
--- a/arch/arm/dts/imx8mp.dtsi
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -10,6 +10,10 @@
 	};
 };
 
+&edacmc {
+	compatible = "fsl,imx8mp-ddrc", "fsl,imx8m-ddrc", "snps,ddrc-3.80a";
+};
+
 feat: &ocotp {
 	#feature-cells = <1>;
 	barebox,feature-controller;
-- 
2.39.1

[PATCH v3 3/3] ARM: dts: i.MX8MP: remove DSP and DSP reserved memory nodes

[Lucas Stach]

The reserved memory for the DSP collides with the Barebox malloc area
in some DRAM configuration. This causes the malloc region reservation
to fail, with all kinds of resulting fallout.

Remove the DSP and DSP reserved memory nodes from the Barebox DT to
work around this issue. This means the DSP won't be usable if the
system is booted with the Barebox builtin DT, but that seems like the
best option so far.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/dts/imx8mp.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
index 778e84318ce7..6962d11e853a 100644
--- a/arch/arm/dts/imx8mp.dtsi
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -10,6 +10,13 @@
 	};
 };
 
+/*
+ * The DSP reserved memory will collide with the Barebox malloc area for some
+ * DRAM sizes, even though the DSP itself is disabled in most configurations.
+ */
+/delete-node/ &dsp;
+/delete-node/ &dsp_reserved;
+
 &edacmc {
 	compatible = "fsl,imx8mp-ddrc", "fsl,imx8m-ddrc", "snps,ddrc-3.80a";
 };
-- 
2.39.1

Re: [PATCH v3 1/3] ARM: i.MX8M: esdctl: use common compatible to detect i.MX8MQ/MM/MP DDRC

[Sascha Hauer]

On Wed, Feb 08, 2023 at 02:34:06PM +0100, Lucas Stach wrote:
> All i.MX8M* DDRC nodes are compatible to "fsl,imx8m-ddrc". As the memory
> size detection works the same on most of them, with the only exception
> being the i.MX8MN, which only has a 16bit data bus, there is no need to
> match the more specific compatibles for i.MX8MQ/MM/MP.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
>  arch/arm/mach-imx/esdctl.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
> index a704250297bb..29e992933421 100644
> --- a/arch/arm/mach-imx/esdctl.c
> +++ b/arch/arm/mach-imx/esdctl.c
> @@ -652,7 +652,7 @@ static __maybe_unused struct imx_esdctl_data vf610_data = {
>  	.add_mem = vf610_ddrmc_add_mem,
>  };
>  
> -static __maybe_unused struct imx_esdctl_data imx8mq_data = {
> +static __maybe_unused struct imx_esdctl_data imx8m_data = {
>  	.base0 = MX8M_DDR_CSD1_BASE_ADDR,
>  	.add_mem = imx8m_ddrc_add_mem,
>  };
> @@ -732,14 +732,11 @@ static __maybe_unused struct of_device_id imx_esdctl_dt_ids[] = {
>  		.compatible = "fsl,vf610-ddrmc",
>  		.data = &vf610_data
>  	}, {
> -		.compatible = "fsl,imx8mm-ddrc",
> -		.data = &imx8mq_data
> +		.compatible = "fsl,imx8m-ddrc",
> +		.data = &imx8m_data
>  	}, {
>  		.compatible = "fsl,imx8mn-ddrc",
>  		.data = &imx8mn_data
> -	}, {
> -		.compatible = "fsl,imx8mq-ddrc",
> -		.data = &imx8mq_data
>  	}, {
>  		.compatible = "fsl,imx7d-ddrc",
>  		.data = &imx7d_data
> -- 
> 2.39.1
> 
> 
> 

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