[PATCH 00/10] arm: socfpga: iossm: add support for mailbox v1

[Michael Tretter <m.tretter@pengutronix.de>]

The IOSSM on the Agilex5 may have different mailbox versions depending
on the Quartus version that was used to generate the SoC configuration.
Up until now, barebox only supports mailbox version 0, which was
configured by versions before Quartus 25.3.0. With Quartus 25.3.0 and
later, the IOSSM provides mailbox version 1, which exposes many
configuration options as registers instead of mailbox responses.

Since the IOSSM is used for SDRAM setup, barebox didn't boot on devices
configured with Quartus 25.3.0 or later.

Refactor the iossm handling and add the handling of IOSSM mailbox
version 1.

While at it, also add inline ECC handling. If the memory interface of
the Agilex5 is configured for inline ECC (which is the current default)
the bootloader has to be aware of inline ECC, too.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
Michael Tretter (10):
      arm: socfpga: iossm: remove uninitialized variable
      arm: socfpga: iossm: add version check
      arm: socfpga: iossm: use local mb_ctrl variable
      arm: socfpga: iossm: store size in bytes
      arm: socfpga: iossm: refactor io96b_mb_init
      arm: socfpga: iossm: refactor return value handling
      arm: socfgpa: iossm: extract poll_bist_mem_init_status
      arm: socfgpa: iossm: extract initialization of one interface
      arm: socfpga: iossm: add memory initialization with inline ecc
      arm: socfpga: iossm: add support for mailbox v1

 arch/arm/mach-socfpga/agilex5-sdram.c |   9 +-
 arch/arm/mach-socfpga/iossm_mailbox.c | 359 ++++++++++++++++++++++++----------
 arch/arm/mach-socfpga/iossm_mailbox.h |   8 +-
 3 files changed, 272 insertions(+), 104 deletions(-)
---
base-commit: 0933e8f2ebf0d91dfcf177a4e4292b02921a53f1
change-id: 20260407-socfpga-iossm-v1-59c19e340a2b

Best regards,
-- 
Michael Tretter <m.tretter@pengutronix.de>