From: Michael Tretter <m.tretter@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
BAREBOX <barebox@lists.infradead.org>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>,
Michael Tretter <m.tretter@pengutronix.de>
Subject: [PATCH v2 06/10] arm: socfpga: iossm: refactor return value handling
Date: Thu, 09 Apr 2026 15:52:46 +0200 [thread overview]
Message-ID: <20260409-socfpga-iossm-v1-v2-6-09effab91bc1@pengutronix.de> (raw)
In-Reply-To: <20260409-socfpga-iossm-v1-v2-0-09effab91bc1@pengutronix.de>
Separate the read of the short return value from the iossm response and
the access of the actual response bits into two separate statements.
This makes the code more readable and helps transitioning to the iossm
v1 API, which uses register reads instead of response messages for these
values.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
Changes in v2:
- none
---
arch/arm/mach-socfpga/iossm_mailbox.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index 53c8687f4db8..2c598a6c192a 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -370,6 +370,7 @@ int io96b_get_mem_technology(struct io96b_info *io96b_ctrl)
struct io96b_mb_resp usr_resp;
struct io96b_mb_ctrl *mb_ctrl;
int i, j;
+ u32 mem_technology_intf;
u8 ddr_type_ret;
/* Initialize ddr type */
@@ -384,9 +385,9 @@ int io96b_get_mem_technology(struct io96b_info *io96b_ctrl)
mb_ctrl->ip_instance_id[j],
CMD_GET_MEM_INFO, GET_MEM_TECHNOLOGY, &usr_resp);
- ddr_type_ret =
- IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status)
- & GENMASK(2, 0);
+ mem_technology_intf = IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status);
+
+ ddr_type_ret = mem_technology_intf & GENMASK(2, 0);
if (!strcmp(io96b_ctrl->ddr_type, "UNKNOWN"))
io96b_ctrl->ddr_type = ddr_type_list[ddr_type_ret];
@@ -452,6 +453,7 @@ int io96b_ecc_enable_status(struct io96b_info *io96b_ctrl)
struct io96b_mb_resp usr_resp;
struct io96b_mb_ctrl *mb_ctrl;
int i, j;
+ u32 ecc_enable_intf;
bool ecc_stat_set = false;
bool ecc_stat;
@@ -467,9 +469,9 @@ int io96b_ecc_enable_status(struct io96b_info *io96b_ctrl)
mb_ctrl->ip_instance_id[j],
CMD_TRIG_CONTROLLER_OP, ECC_ENABLE_STATUS,
&usr_resp);
+ ecc_enable_intf = IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status)
- ecc_stat = ((IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status)
- & GENMASK(1, 0)) == 0 ? false : true);
+ ecc_stat = (ecc_enable_intf & GENMASK(1, 0)) == 0 ? false : true;
if (!ecc_stat_set) {
io96b_ctrl->ecc_status = ecc_stat;
@@ -495,6 +497,7 @@ int io96b_bist_mem_init_start(struct io96b_info *io96b_ctrl)
int i, j;
bool bist_start, bist_success;
int timeout = 1000000;
+ u32 mem_init_status_intf;
/* Full memory initialization BIST performed on all memory interface(s) */
for (i = 0; i < io96b_ctrl->num_instance; i++) {
@@ -508,18 +511,15 @@ int io96b_bist_mem_init_start(struct io96b_info *io96b_ctrl)
io96b_ctrl->io96b[i].mb_ctrl.ip_instance_id[j],
CMD_TRIG_CONTROLLER_OP, BIST_MEM_INIT_START,
0x40, 0, 0, 0, 0, 0, 0, &usr_resp);
+ mem_init_status_intf = IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status);
- bist_start =
- (IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status)
- & BIT(0));
+ bist_start = mem_init_status_intf & BIT(0);
if (!bist_start) {
pr_err("%s: Failed to initialized memory on IO96B_%d\n",
__func__, i);
pr_err("%s: BIST_MEM_INIT_START Error code 0x%x\n",
- __func__,
- (IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status)
- & GENMASK(2, 1)) > 0x1);
+ __func__, (mem_init_status_intf & GENMASK(2, 1)) > 0x1);
return -ENOEXEC;
}
@@ -530,9 +530,9 @@ int io96b_bist_mem_init_start(struct io96b_info *io96b_ctrl)
io96b_ctrl->io96b[i].mb_ctrl.ip_instance_id[j],
CMD_TRIG_CONTROLLER_OP,
BIST_MEM_INIT_STATUS, &usr_resp);
+ mem_init_status_intf = IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status)
- bist_success = (IOSSM_CMD_RESPONSE_DATA_SHORT
- (usr_resp.cmd_resp_status) & BIT(0));
+ bist_success = mem_init_status_intf & BIT(0);
if (!bist_success && (timeout-- < 0)) {
pr_err("%s: Timeout initialize memory on IO96B_%d\n",
--
2.47.3
next prev parent reply other threads:[~2026-04-09 13:55 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-09 13:52 [PATCH v2 00/10] arm: socfpga: iossm: add support for mailbox v1 Michael Tretter
2026-04-09 13:52 ` [PATCH v2 01/10] arm: socfpga: iossm: remove uninitialized variable Michael Tretter
2026-04-09 13:52 ` [PATCH v2 02/10] arm: socfpga: iossm: add version check Michael Tretter
2026-04-10 8:18 ` Ahmad Fatoum
2026-04-10 13:24 ` Michael Tretter
2026-04-09 13:52 ` [PATCH v2 03/10] arm: socfpga: iossm: use local mb_ctrl variable Michael Tretter
2026-04-09 13:52 ` [PATCH v2 04/10] arm: socfpga: iossm: store size in bytes Michael Tretter
2026-04-10 8:13 ` Ahmad Fatoum
2026-04-10 8:31 ` Michael Tretter
2026-04-10 8:37 ` Ahmad Fatoum
2026-04-10 12:06 ` Michael Tretter
2026-04-13 7:27 ` Sascha Hauer
2026-04-09 13:52 ` [PATCH v2 05/10] arm: socfpga: iossm: refactor io96b_mb_init Michael Tretter
2026-04-09 13:52 ` Michael Tretter [this message]
2026-04-09 13:52 ` [PATCH v2 07/10] arm: socfgpa: iossm: extract poll_bist_mem_init_status Michael Tretter
2026-04-09 13:52 ` [PATCH v2 08/10] arm: socfgpa: iossm: extract initialization of one interface Michael Tretter
2026-04-15 6:12 ` Sascha Hauer
2026-04-15 8:29 ` Michael Tretter
2026-04-15 10:31 ` Sascha Hauer
2026-04-15 10:56 ` [PATCH] fixup! " Michael Tretter
2026-04-15 11:48 ` Sascha Hauer
2026-04-09 13:52 ` [PATCH v2 09/10] arm: socfpga: iossm: add memory initialization with inline ecc Michael Tretter
2026-04-09 13:52 ` [PATCH v2 10/10] arm: socfpga: iossm: add support for mailbox v1 Michael Tretter
2026-04-10 8:19 ` [PATCH v2 00/10] " Ahmad Fatoum
2026-04-13 7:26 ` Sascha Hauer
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