[PATCH 0/6] arm: socfpga: iossm: code cleanup

[PATCH 0/6] arm: socfpga: iossm: code cleanup

[Michael Tretter]

There are a few surprises in the iossm_mailbox code that seem
unnecessary or even confusing. Cleanup the code in an attempt to make it
less convoluted and easier to read and understand.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
Michael Tretter (6):
      arm: socfpga: iossm: make io96b_cal_status static
      arm: socfpga: iossm: use readl_poll_timeout
      arm: socfpga: iossm: remove duplicate read of response status
      arm: socfpga: iossm: remove multiple read of status_addr
      arm: socfpga: iossm: change io96b_csr_addr to void *
      arm: socfpga: iossm: extract io96b_mb_init_instance

 arch/arm/mach-socfpga/agilex5-sdram.c |   6 +-
 arch/arm/mach-socfpga/iossm_mailbox.c | 216 +++++++++++++++-------------------
 arch/arm/mach-socfpga/iossm_mailbox.h |   7 +-
 3 files changed, 104 insertions(+), 125 deletions(-)
---
base-commit: 2f83a1e9e4ecf9f2fe1948550801c27a60769d2b
change-id: 20260416-socfpga-agilex5-iossm-cleanup-9b249f123e15

Best regards,
-- 
Michael Tretter <m.tretter@pengutronix.de>

[PATCH 1/6] arm: socfpga: iossm: make io96b_cal_status static

[Michael Tretter]

The function is only used in iossm_mailbox. Make it static.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/iossm_mailbox.c | 2 +-
 arch/arm/mach-socfpga/iossm_mailbox.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index 2d287b57c0b2..b8c1fcf68c09 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -258,7 +258,7 @@ void io96b_mb_init(struct io96b_info *io96b_ctrl)
 	}
 }
 
-int io96b_cal_status(phys_addr_t addr)
+static int io96b_cal_status(phys_addr_t addr)
 {
 	int ret;
 	u32 cal_success, cal_fail;
diff --git a/arch/arm/mach-socfpga/iossm_mailbox.h b/arch/arm/mach-socfpga/iossm_mailbox.h
index febe51591ca0..5db558ff04c6 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.h
+++ b/arch/arm/mach-socfpga/iossm_mailbox.h
@@ -150,7 +150,6 @@ static inline int io96b_mb_req_no_param(phys_addr_t io96b_csr_addr, u32 ip_type,
 
 /* Supported IOSSM mailbox function */
 void io96b_mb_init(struct io96b_info *io96b_ctrl);
-int io96b_cal_status(phys_addr_t addr);
 void io96b_init_mem_cal(struct io96b_info *io96b_ctrl);
 int io96b_trig_mem_cal(struct io96b_info *io96b_ctrl);
 int io96b_get_mem_technology(struct io96b_info *io96b_ctrl);

-- 
2.47.3

[PATCH 2/6] arm: socfpga: iossm: use readl_poll_timeout

[Michael Tretter]

Avoid the custom wait_for_timeout() polling function, but use the
standard readl_poll_timeout() instead.

Actually, the timeout isn't used, because the code is executed in the
PBL. Since this is the SDRAM setup, this doesn't matter since the boot
can't continue in case of a timeout, anyway.

The 10 seconds timeout is the same as used before by the custom
wait_for_timeout() function. U-Boot uses 120 seconds as timeout.

readl_poll_timeout() has the additional advantage that we may reuse the
read register value afterwards.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/iossm_mailbox.c | 41 +++++++++++++++--------------------
 1 file changed, 17 insertions(+), 24 deletions(-)

diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index b8c1fcf68c09..7ec79dec4534 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <io.h>
 #include <linux/bitfield.h>
+#include <linux/iopoll.h>
 #include <linux/sizes.h>
 #include "iossm_mailbox.h"
 #include <mach/socfpga/generic.h>
@@ -48,30 +49,13 @@ static const char *ddr_type_list[7] = {
 		"DDR4", "DDR5", "DDR5_RDIMM", "LPDDR4", "LPDDR5", "QDRIV", "UNKNOWN"
 };
 
-static int wait_for_timeout(const void __iomem *reg, u32 mask, bool set)
-{
-	int timeout = 1000000;
-	int val;
-
-	while (timeout > 0) {
-		val = readl(IOMEM(reg));
-		if (!set)
-			val = ~val;
-
-		if ((val & mask) == mask)
-			return 0;
-		__udelay(10);
-		timeout--;
-	}
-
-	return -ETIMEDOUT;
-}
-
 static int is_ddr_csr_clkgen_locked(u32 clkgen_mask, u8 num_port)
 {
 	int ret;
+	u32 tmp;
 
-	ret = wait_for_timeout(IOMEM(ECC_INTSTATUS_SERR), clkgen_mask, true);
+	ret = readl_poll_timeout(IOMEM(ECC_INTSTATUS_SERR),
+				 tmp, tmp & clkgen_mask, 10 * USEC_PER_SEC);
 	if (ret) {
 		pr_debug("%s: ddr csr clkgena locked is timeout\n", __func__);
 		return ret;
@@ -105,7 +89,9 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 	memset(resp, 0x0, sizeof(*resp));
 
 	/* Ensure CMD_REQ is cleared before write any command request */
-	ret = wait_for_timeout((IOMEM(io96b_csr_addr) + IOSSM_CMD_REQ_OFFSET), GENMASK(31, 0), false);
+	ret = readl_poll_timeout(IOMEM(io96b_csr_addr) + IOSSM_CMD_REQ_OFFSET,
+				 cmd_req, !(cmd_req & GENMASK(31, 0)),
+				 10 * USEC_PER_SEC);
 	if (ret) {
 		pr_err("%s: CMD_REQ not ready\n", __func__);
 		return -1;
@@ -135,8 +121,10 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 		 cmd_req, io96b_csr_addr + IOSSM_CMD_REQ_OFFSET);
 
 	/* Read CMD_RESPONSE_READY in CMD_RESPONSE_STATUS*/
-	ret = wait_for_timeout((IOMEM(io96b_csr_addr) + IOSSM_CMD_RESPONSE_STATUS_OFFSET),
-			       IOSSM_STATUS_COMMAND_RESPONSE_READY, true);
+	ret = readl_poll_timeout(IOMEM(io96b_csr_addr) + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
+				 resp->cmd_resp_status,
+				 resp->cmd_resp_status & IOSSM_STATUS_COMMAND_RESPONSE_READY,
+				 10 * USEC_PER_SEC);
 	if (ret) {
 		pr_err("%s: CMD_RESPONSE ERROR:\n", __func__);
 		cmd_resp = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET);
@@ -262,9 +250,14 @@ static int io96b_cal_status(phys_addr_t addr)
 {
 	int ret;
 	u32 cal_success, cal_fail;
+	u32 cal_status;
 	phys_addr_t status_addr = addr + IOSSM_STATUS_OFFSET;
+
 	/* Ensure calibration completed */
-	ret = wait_for_timeout(IOMEM(status_addr), IOSSM_STATUS_CAL_BUSY, false);
+	ret = readl_poll_timeout(IOMEM(status_addr),
+				 cal_status,
+				 !(cal_status & IOSSM_STATUS_CAL_BUSY),
+				 10 * USEC_PER_SEC);
 	if (ret) {
 		pr_err("%s: SDRAM calibration IO96b instance 0x%llx timeout\n",
 		       __func__, status_addr);

-- 
2.47.3

[PATCH 3/6] arm: socfpga: iossm: remove duplicate read of response status

[Michael Tretter]

The IOSSM_CMD_RESPONSE_STATUS doesn't change after the mailbox command
has returned. Reading the register again isn't necessary.

While clearing the IOSSM_STATUS_COMMAND_RESPONSE_READY bit changes the
response status, this bit may be set in the returned response.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/iossm_mailbox.c | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index 7ec79dec4534..24d1404be1a1 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -83,7 +83,7 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 		 struct io96b_mb_resp *resp)
 {
 	int ret;
-	u32 cmd_req, cmd_resp;
+	u32 cmd_req;
 
 	/* Initialized zeros for responses*/
 	memset(resp, 0x0, sizeof(*resp));
@@ -125,17 +125,14 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 				 resp->cmd_resp_status,
 				 resp->cmd_resp_status & IOSSM_STATUS_COMMAND_RESPONSE_READY,
 				 10 * USEC_PER_SEC);
-	if (ret) {
-		pr_err("%s: CMD_RESPONSE ERROR:\n", __func__);
-		cmd_resp = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET);
-		pr_err("%s: STATUS_GENERAL_ERROR: 0x%x\n", __func__, (cmd_resp >> 1) & 0xF);
-		pr_err("%s: STATUS_CMD_RESPONSE_ERROR: 0x%x\n", __func__, (cmd_resp >> 5) & 0x7);
-	}
+	if (ret)
+		pr_warn("%s: CMD_RESPONSE_STATUS ERROR: 0x%lx 0x%lx\n", __func__,
+			FIELD_GET(GENMASK(4, 1), resp->cmd_resp_status),
+			FIELD_GET(GENMASK(7, 5), resp->cmd_resp_status));
 
-	/* read CMD_RESPONSE_STATUS*/
-	resp->cmd_resp_status = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET);
-	pr_debug("%s: CMD_RESPONSE_STATUS 0x%llx: 0x%x\n", __func__, io96b_csr_addr +
-		IOSSM_CMD_RESPONSE_STATUS_OFFSET, resp->cmd_resp_status);
+	pr_debug("%s: CMD_RESPONSE_STATUS 0x%p: 0x%x\n", __func__,
+		 io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
+		 resp->cmd_resp_status);
 
 	/* read CMD_RESPONSE_DATA_* */
 	resp->cmd_resp_data[0] = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_0_OFFSET);
@@ -151,19 +148,10 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 		 __func__, io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_2_OFFSET,
 		 resp->cmd_resp_data[2]);
 
-	resp->cmd_resp_status = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET);
-	pr_debug("%s: CMD_RESPONSE_STATUS 0x%llx: 0x%x\n", __func__,
-		 io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
-		 resp->cmd_resp_status);
-
 	/* write CMD_RESPONSE_READY = 0 */
 	clrbits_le32((u32 *)(uintptr_t)(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET),
 		     IOSSM_STATUS_COMMAND_RESPONSE_READY);
 
-	resp->cmd_resp_status = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET);
-	pr_debug("%s: CMD_RESPONSE_READY 0x%llx: 0x%x\n", __func__, io96b_csr_addr +
-		 IOSSM_CMD_RESPONSE_STATUS_OFFSET, resp->cmd_resp_status);
-
 	return 0;
 }
 

-- 
2.47.3

[PATCH 4/6] arm: socfpga: iossm: remove multiple read of status_addr

[Michael Tretter]

The value of status_addr is already stored in cal_status. Reading the
register again is useless.

Remove the additional reads and use cal_status directly.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/iossm_mailbox.c | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index 24d1404be1a1..fbf46a08d273 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -237,26 +237,21 @@ void io96b_mb_init(struct io96b_info *io96b_ctrl)
 static int io96b_cal_status(phys_addr_t addr)
 {
 	int ret;
-	u32 cal_success, cal_fail;
 	u32 cal_status;
-	phys_addr_t status_addr = addr + IOSSM_STATUS_OFFSET;
 
 	/* Ensure calibration completed */
-	ret = readl_poll_timeout(IOMEM(status_addr),
+	ret = readl_poll_timeout(IOMEM(addr) + IOSSM_STATUS_OFFSET,
 				 cal_status,
 				 !(cal_status & IOSSM_STATUS_CAL_BUSY),
 				 10 * USEC_PER_SEC);
 	if (ret) {
 		pr_err("%s: SDRAM calibration IO96b instance 0x%llx timeout\n",
-		       __func__, status_addr);
+		       __func__, addr);
 		hang();
 	}
 
-	/* Calibration status */
-	cal_success = readl(status_addr) & IOSSM_STATUS_CAL_SUCCESS;
-	cal_fail = readl(status_addr) & IOSSM_STATUS_CAL_FAIL;
-
-	if (cal_success && !cal_fail)
+	if ((cal_status & IOSSM_STATUS_CAL_SUCCESS) &&
+	    !(cal_status & IOSSM_STATUS_CAL_FAIL))
 		return 0;
 	else
 		return -EPERM;

-- 
2.47.3

[PATCH 5/6] arm: socfpga: iossm: change io96b_csr_addr to void *

[Michael Tretter]

Keeping the io96b_csr_addr as void __iomem * simplifies all reads based
on the address and removes any casts.

Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/agilex5-sdram.c |  6 +++---
 arch/arm/mach-socfpga/iossm_mailbox.c | 37 +++++++++++++++++------------------
 arch/arm/mach-socfpga/iossm_mailbox.h |  6 +++---
 3 files changed, 24 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-socfpga/agilex5-sdram.c b/arch/arm/mach-socfpga/agilex5-sdram.c
index 4e7994985d26..f03d5431e569 100644
--- a/arch/arm/mach-socfpga/agilex5-sdram.c
+++ b/arch/arm/mach-socfpga/agilex5-sdram.c
@@ -120,9 +120,9 @@ static int populate_ddr_handoff(struct altera_sdram_plat *plat, struct io96b_inf
 
 	/* Assign IO96B CSR base address if it is valid */
 	for (i = 0; i < io96b_ctrl->num_instance; i++) {
-		io96b_ctrl->io96b[i].io96b_csr_addr = io96b_csr_reg_addr[i];
-		pr_debug("%s: IO96B 0x%llx CSR enabled\n", __func__
-			, io96b_ctrl->io96b[i].io96b_csr_addr);
+		io96b_ctrl->io96b[i].io96b_csr_addr = IOMEM(io96b_csr_reg_addr[i]);
+		pr_debug("%s: IO96B_%d: 0x%p CSR enabled\n", __func__,
+			 i, io96b_ctrl->io96b[i].io96b_csr_addr);
 	}
 
 	return 0;
diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index fbf46a08d273..3a48026d5dd6 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -76,7 +76,7 @@ static int is_ddr_csr_clkgen_locked(u32 clkgen_mask, u8 num_port)
  * @resp:			Structure contain responses returned from the requested IOSSM
  *					mailbox command
  */
-int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
+int io96b_mb_req(void __iomem *io96b_csr_addr, u32 ip_type, u32 instance_id,
 		 u32 usr_cmd_type, u32 usr_cmd_opcode, u32 cmd_param_0,
 		 u32 cmd_param_1, u32 cmd_param_2, u32 cmd_param_3,
 		 u32 cmd_param_4, u32 cmd_param_5, u32 cmd_param_6,
@@ -89,7 +89,7 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 	memset(resp, 0x0, sizeof(*resp));
 
 	/* Ensure CMD_REQ is cleared before write any command request */
-	ret = readl_poll_timeout(IOMEM(io96b_csr_addr) + IOSSM_CMD_REQ_OFFSET,
+	ret = readl_poll_timeout(io96b_csr_addr + IOSSM_CMD_REQ_OFFSET,
 				 cmd_req, !(cmd_req & GENMASK(31, 0)),
 				 10 * USEC_PER_SEC);
 	if (ret) {
@@ -117,11 +117,11 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 	cmd_req = (usr_cmd_opcode << 0) | (usr_cmd_type << 16) | (instance_id << 24) |
 		(ip_type << 29);
 	writel(cmd_req, io96b_csr_addr + IOSSM_CMD_REQ_OFFSET);
-	pr_debug("%s: Write 0x%x to IOSSM_CMD_REQ_OFFSET 0x%llx\n", __func__,
+	pr_debug("%s: Write 0x%x to IOSSM_CMD_REQ_OFFSET 0x%p\n", __func__,
 		 cmd_req, io96b_csr_addr + IOSSM_CMD_REQ_OFFSET);
 
 	/* Read CMD_RESPONSE_READY in CMD_RESPONSE_STATUS*/
-	ret = readl_poll_timeout(IOMEM(io96b_csr_addr) + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
+	ret = readl_poll_timeout(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
 				 resp->cmd_resp_status,
 				 resp->cmd_resp_status & IOSSM_STATUS_COMMAND_RESPONSE_READY,
 				 10 * USEC_PER_SEC);
@@ -129,27 +129,26 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 		pr_warn("%s: CMD_RESPONSE_STATUS ERROR: 0x%lx 0x%lx\n", __func__,
 			FIELD_GET(GENMASK(4, 1), resp->cmd_resp_status),
 			FIELD_GET(GENMASK(7, 5), resp->cmd_resp_status));
-
 	pr_debug("%s: CMD_RESPONSE_STATUS 0x%p: 0x%x\n", __func__,
 		 io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
 		 resp->cmd_resp_status);
 
 	/* read CMD_RESPONSE_DATA_* */
 	resp->cmd_resp_data[0] = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_0_OFFSET);
-	pr_debug("%s: IOSSM_CMD_RESPONSE_DATA_0_OFFSET 0x%llx: 0x%x\n",
-		 __func__, io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_0_OFFSET,
+	pr_debug("%s: IOSSM_CMD_RESPONSE_DATA_0_OFFSET 0x%p: 0x%x\n", __func__,
+		 io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_0_OFFSET,
 		 resp->cmd_resp_data[0]);
 	resp->cmd_resp_data[1] = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_1_OFFSET);
-	pr_debug("%s: IOSSM_CMD_RESPONSE_DATA_1_OFFSET 0x%llx: 0x%x\n",
-		 __func__, io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_1_OFFSET,
+	pr_debug("%s: IOSSM_CMD_RESPONSE_DATA_1_OFFSET 0x%p: 0x%x\n", __func__,
+		 io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_1_OFFSET,
 		 resp->cmd_resp_data[1]);
 	resp->cmd_resp_data[2] = readl(io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_2_OFFSET);
-	pr_debug("%s: IOSSM_CMD_RESPONSE_DATA_2_OFFSET 0x%llx: 0x%x\n",
-		 __func__, io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_2_OFFSET,
+	pr_debug("%s: IOSSM_CMD_RESPONSE_DATA_2_OFFSET 0x%p: 0x%x\n", __func__,
+		 io96b_csr_addr + IOSSM_CMD_RESPONSE_DATA_2_OFFSET,
 		 resp->cmd_resp_data[2]);
 
 	/* write CMD_RESPONSE_READY = 0 */
-	clrbits_le32((u32 *)(uintptr_t)(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET),
+	clrbits_le32(io96b_csr_addr + IOSSM_CMD_RESPONSE_STATUS_OFFSET,
 		     IOSSM_STATUS_COMMAND_RESPONSE_READY);
 
 	return 0;
@@ -157,7 +156,7 @@ int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
 
 static int io96b_mb_version(struct io96b_info *io96b_ctrl)
 {
-	phys_addr_t io96b_csr_addr = io96b_ctrl->io96b[0].io96b_csr_addr;
+	void __iomem *io96b_csr_addr = io96b_ctrl->io96b[0].io96b_csr_addr;
 	u32 mailbox_header;
 	int version;
 
@@ -234,19 +233,19 @@ void io96b_mb_init(struct io96b_info *io96b_ctrl)
 	}
 }
 
-static int io96b_cal_status(phys_addr_t addr)
+static int io96b_cal_status(void __iomem *io96b_csr_addr)
 {
 	int ret;
 	u32 cal_status;
 
 	/* Ensure calibration completed */
-	ret = readl_poll_timeout(IOMEM(addr) + IOSSM_STATUS_OFFSET,
+	ret = readl_poll_timeout(io96b_csr_addr + IOSSM_STATUS_OFFSET,
 				 cal_status,
 				 !(cal_status & IOSSM_STATUS_CAL_BUSY),
 				 10 * USEC_PER_SEC);
 	if (ret) {
-		pr_err("%s: SDRAM calibration IO96b instance 0x%llx timeout\n",
-		       __func__, addr);
+		pr_err("%s: SDRAM calibration IO96b instance 0x%p timeout\n",
+		       __func__, io96b_csr_addr);
 		hang();
 	}
 
@@ -527,7 +526,7 @@ int io96b_ecc_enable_status(struct io96b_info *io96b_ctrl)
 static int io96b_poll_bist_mem_init_status(struct io96b_info *io96b_ctrl,
 					   int instance, int interface)
 {
-	phys_addr_t io96b_csr_addr = io96b_ctrl->io96b[instance].io96b_csr_addr;
+	void __iomem *io96b_csr_addr = io96b_ctrl->io96b[instance].io96b_csr_addr;
 	struct io96b_mb_ctrl *mb_ctrl = &io96b_ctrl->io96b[instance].mb_ctrl;
 	int timeout = 1 * USEC_PER_SEC;
 	bool bist_success = false;
@@ -572,7 +571,7 @@ static int bist_mem_init_by_addr(struct io96b_info *io96b_ctrl,
 				 int instance, int interface,
 				 phys_addr_t base_addr, phys_size_t size)
 {
-	phys_addr_t io96b_csr_addr = io96b_ctrl->io96b[instance].io96b_csr_addr;
+	void __iomem *io96b_csr_addr = io96b_ctrl->io96b[instance].io96b_csr_addr;
 	struct io96b_mb_ctrl *mb_ctrl = &io96b_ctrl->io96b[instance].mb_ctrl;
 	struct io96b_mb_resp usr_resp;
 	bool bist_start = false;
diff --git a/arch/arm/mach-socfpga/iossm_mailbox.h b/arch/arm/mach-socfpga/iossm_mailbox.h
index 5db558ff04c6..0e942a632847 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.h
+++ b/arch/arm/mach-socfpga/iossm_mailbox.h
@@ -103,7 +103,7 @@ struct io96b_mb_resp {
  */
 struct io96b_instance {
 	phys_size_t size;
-	phys_addr_t io96b_csr_addr;
+	void __iomem *io96b_csr_addr;
 	bool cal_status;
 	struct io96b_mb_ctrl mb_ctrl;
 };
@@ -134,13 +134,13 @@ struct io96b_info {
 	u8			 num_port;
 };
 
-int io96b_mb_req(phys_addr_t io96b_csr_addr, u32 ip_type, u32 instance_id,
+int io96b_mb_req(void __iomem *io96b_csr_addr, u32 ip_type, u32 instance_id,
 		 u32 usr_cmd_type, u32 usr_cmd_opcode, u32 cmd_param_0,
 		 u32 cmd_param_1, u32 cmd_param_2, u32 cmd_param_3,
 		 u32 cmd_param_4, u32 cmd_param_5, u32 cmd_param_6,
 		 struct io96b_mb_resp *resp);
 
-static inline int io96b_mb_req_no_param(phys_addr_t io96b_csr_addr, u32 ip_type,
+static inline int io96b_mb_req_no_param(void __iomem *io96b_csr_addr, u32 ip_type,
 					u32 instance_id, u32 usr_cmd_type,
 					u32 usr_cmd_opcode, struct io96b_mb_resp *resp)
 {

-- 
2.47.3

[PATCH 6/6] arm: socfpga: iossm: extract io96b_mb_init_instance

[Michael Tretter]

Extract io96b_mb_init_instance() from io96b_mb_init() to initialize
exactly one io96b instance.

No functional change.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/mach-socfpga/iossm_mailbox.c | 93 ++++++++++++++++++-----------------
 1 file changed, 49 insertions(+), 44 deletions(-)

diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index 3a48026d5dd6..06d451c597f0 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -166,16 +166,59 @@ static int io96b_mb_version(struct io96b_info *io96b_ctrl)
 	return version;
 }
 
+static void io96b_mb_init_instance(struct io96b_info *io96b_ctrl, int instance)
+{
+	void __iomem *io96b_csr_addr = io96b_ctrl->io96b[instance].io96b_csr_addr;
+	struct io96b_mb_ctrl *mb_ctrl = &io96b_ctrl->io96b[instance].mb_ctrl;
+	struct io96b_mb_resp usr_resp;
+	u32 mem_intf_info[2];
+	int num_mem_interface = ARRAY_SIZE(mem_intf_info);
+	int i;
+
+	pr_debug("%s: Initialize IO96B_%d\n", __func__, instance);
+
+	/* Get memory interface IP type and instance ID (IP identifier) */
+	if (io96b_ctrl->version == 1) {
+		mem_intf_info[0] = readl(io96b_csr_addr + IOSSM_MEM_INTF_INFO_0_OFFSET);
+		mem_intf_info[1] = readl(io96b_csr_addr + IOSSM_MEM_INTF_INFO_1_OFFSET);
+	} else {
+		io96b_mb_req_no_param(io96b_csr_addr, 0, 0,
+				      CMD_GET_SYS_INFO, GET_MEM_INTF_INFO,
+				      &usr_resp);
+		num_mem_interface =
+			IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status) & 0x3;
+		for (i = 0; i < num_mem_interface; i++)
+			mem_intf_info[i] = usr_resp.cmd_resp_data[i];
+	}
+
+	/* Retrieve memory interface IP type and instance ID (IP identifier) */
+	for (i = 0; i < num_mem_interface; i++) {
+		int interface = mb_ctrl->num_mem_interface;
+		u8 ip_type;
+		u8 instance_id;
+
+		ip_type = FIELD_GET(INTF_IP_TYPE_MASK, mem_intf_info[i]);
+		instance_id = FIELD_GET(INTF_INSTANCE_ID_MASK, mem_intf_info[i]);
+
+		if (!ip_type)
+			continue;
+
+		mb_ctrl->num_mem_interface++;
+		mb_ctrl->ip_type[interface] = ip_type;
+		mb_ctrl->ip_instance_id[interface] = instance_id;
+
+		pr_debug("%s: IO96B_%d interface %d: ip_type=0x%x instance_id=0x%x\n",
+			 __func__, instance, interface, ip_type, instance_id);
+	}
+}
+
 /*
  * Initial function to be called to set memory interface IP type and instance ID
  * IP type and instance ID need to be determined before sending mailbox command
  */
 void io96b_mb_init(struct io96b_info *io96b_ctrl)
 {
-	struct io96b_mb_resp usr_resp;
-	struct io96b_mb_ctrl *mb_ctrl;
-	u8 ip_type_ret, instance_id_ret;
-	int i, j, k;
+	int i;
 	int version;
 
 	version = io96b_mb_version(io96b_ctrl);
@@ -191,46 +234,8 @@ void io96b_mb_init(struct io96b_info *io96b_ctrl)
 	io96b_ctrl->version = version;
 
 	pr_debug("%s: num_instance %d\n", __func__, io96b_ctrl->num_instance);
-	for (i = 0; i < io96b_ctrl->num_instance; i++) {
-		int num_mem_interface = 0;
-		u32 mem_intf_info[2];
-
-		mb_ctrl = &io96b_ctrl->io96b[i].mb_ctrl;
-		pr_debug("%s: get memory interface IO96B %d\n", __func__, i);
-		/* Get memory interface IP type and instance ID (IP identifier) */
-		if (io96b_ctrl->version == 1) {
-			mem_intf_info[0] = readl(io96b_ctrl->io96b[i].io96b_csr_addr +
-						 IOSSM_MEM_INTF_INFO_0_OFFSET);
-			mem_intf_info[1] = readl(io96b_ctrl->io96b[i].io96b_csr_addr +
-						 IOSSM_MEM_INTF_INFO_1_OFFSET);
-			num_mem_interface = 2;
-		} else {
-			io96b_mb_req_no_param(io96b_ctrl->io96b[i].io96b_csr_addr, 0, 0,
-					      CMD_GET_SYS_INFO, GET_MEM_INTF_INFO, &usr_resp);
-			num_mem_interface =
-				IOSSM_CMD_RESPONSE_DATA_SHORT(usr_resp.cmd_resp_status) & 0x3;
-			for (j = 0; j < num_mem_interface; j++)
-				mem_intf_info[j] = usr_resp.cmd_resp_data[j];
-		}
-
-		/* Retrieve memory interface IP type and instance ID (IP identifier) */
-		j = 0;
-		for (k = 0; k < num_mem_interface; k++) {
-			ip_type_ret = FIELD_GET(INTF_IP_TYPE_MASK, mem_intf_info[k]);
-			instance_id_ret = FIELD_GET(INTF_INSTANCE_ID_MASK, mem_intf_info[k]);
-
-			if (ip_type_ret) {
-				mb_ctrl->num_mem_interface++;
-				mb_ctrl->ip_type[j] = ip_type_ret;
-				mb_ctrl->ip_instance_id[j] = instance_id_ret;
-				pr_debug("%s: IO96B %d mem_interface %d: ip_type_ret: 0x%x\n",
-					 __func__, i, j, ip_type_ret);
-				pr_debug("%s: IO96B %d mem_interface %d: instance_id_ret: 0x%x\n",
-					 __func__, i, j, instance_id_ret);
-				j++;
-			}
-		}
-	}
+	for (i = 0; i < io96b_ctrl->num_instance; i++)
+		io96b_mb_init_instance(io96b_ctrl, i);
 }
 
 static int io96b_cal_status(void __iomem *io96b_csr_addr)

-- 
2.47.3

Re: [PATCH 0/6] arm: socfpga: iossm: code cleanup

[Sascha Hauer]

On Thu, 16 Apr 2026 17:25:45 +0200, Michael Tretter wrote:
> There are a few surprises in the iossm_mailbox code that seem
> unnecessary or even confusing. Cleanup the code in an attempt to make it
> less convoluted and easier to read and understand.
> 
> 

Applied, thanks!

[1/6] arm: socfpga: iossm: make io96b_cal_status static
      https://git.pengutronix.de/cgit/barebox/commit/?id=f896be6a4859 (link may not be stable)
[2/6] arm: socfpga: iossm: use readl_poll_timeout
      https://git.pengutronix.de/cgit/barebox/commit/?id=b71ef5c0b7ef (link may not be stable)
[3/6] arm: socfpga: iossm: remove duplicate read of response status
      https://git.pengutronix.de/cgit/barebox/commit/?id=ef36325ed132 (link may not be stable)
[4/6] arm: socfpga: iossm: remove multiple read of status_addr
      https://git.pengutronix.de/cgit/barebox/commit/?id=cd08579f3815 (link may not be stable)
[5/6] arm: socfpga: iossm: change io96b_csr_addr to void *
      https://git.pengutronix.de/cgit/barebox/commit/?id=040df1af08b3 (link may not be stable)
[6/6] arm: socfpga: iossm: extract io96b_mb_init_instance
      https://git.pengutronix.de/cgit/barebox/commit/?id=7199a53aa06a (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer@pengutronix.de>