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From: Oleksij Rempel <o.rempel@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Subject: [PATCH v1 06/10] mci: atmel-sdhci: add Microchip LAN9691 / LAN969X SDHCI support
Date: Fri, 12 Jun 2026 07:59:22 +0200	[thread overview]
Message-ID: <20260612055930.635833-6-o.rempel@pengutronix.de> (raw)
In-Reply-To: <20260612055930.635833-1-o.rempel@pengutronix.de>

Match the "microchip,lan9691-sdhci" compatible and allow building on
ARCH_MICROCHIP (and COMPILE_TEST). LAN969X uses a different GCK rate
(100 MHz) than the AT91 SAMA5D2 (240 MHz), so plumb the per-compatible
rate through device_get_match_data() and fall back to the SAMA5D2 rate
when no match data is supplied.

The LAN969X SDHCI binding doesn't expose the PMC base clock that
sama5d2/sam9x60 carry as "baseclk" (the GCK driver handles the upstream
source internally), so make that lookup optional.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 drivers/mci/Kconfig       |  6 +++---
 drivers/mci/atmel-sdhci.c | 22 ++++++++++++++++++----
 2 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
index b38f7a3bdf8b..8108c7b14848 100644
--- a/drivers/mci/Kconfig
+++ b/drivers/mci/Kconfig
@@ -197,12 +197,12 @@ config MCI_ATMEL
 	  Atmel AT91.
 
 config MCI_ATMEL_SDHCI
-	bool "ATMEL SDHCI (sama5d2)"
+	bool "ATMEL SDHCI (sama5d2, lan9691)"
 	select MCI_SDHCI
-	depends on ARCH_AT91
+	depends on ARCH_AT91 || ARCH_MICROCHIP || COMPILE_TEST
 	help
 	  Enable this entry to add support to read and write SD cards on an
-	  Atmel sama5d2
+	  Atmel sama5d2 or Microchip LAN969X.
 
 config MCI_MMCI
 	bool "ARM PL180 MMCI"
diff --git a/drivers/mci/atmel-sdhci.c b/drivers/mci/atmel-sdhci.c
index 462cf21bc25f..458d022fa3fa 100644
--- a/drivers/mci/atmel-sdhci.c
+++ b/drivers/mci/atmel-sdhci.c
@@ -18,6 +18,7 @@
 
 #define ATMEL_SDHC_MIN_FREQ	400000
 #define ATMEL_SDHC_GCK_RATE	240000000
+#define LAN969X_GCK_RATE	100000000
 
 struct at91_sdhci_priv {
 	struct at91_sdhci host;
@@ -55,7 +56,8 @@ static int at91_sdhci_mci_init(struct mci_host *mci, struct device *dev)
 			       priv->mci.non_removable, priv->cal_always_on);
 }
 
-static int at91_sdhci_conf_clks(struct at91_sdhci_priv *priv)
+static int at91_sdhci_conf_clks(struct at91_sdhci_priv *priv,
+				unsigned long gck_rate)
 {
 	unsigned long real_gck_rate;
 	int ret;
@@ -66,7 +68,7 @@ static int at91_sdhci_conf_clks(struct at91_sdhci_priv *priv)
 	 * base clock rate and the clock mult from capabilities.
 	 */
 	clk_enable(priv->hclock);
-	ret = clk_set_rate(priv->gck, ATMEL_SDHC_GCK_RATE);
+	ret = clk_set_rate(priv->gck, gck_rate);
 	if (ret < 0) {
 		clk_disable(priv->hclock);
 		return ret;
@@ -109,6 +111,11 @@ static int at91_sdhci_probe(struct device *dev)
 {
 	struct at91_sdhci_priv *priv;
 	struct resource *iores;
+	unsigned long gck_rate;
+
+	gck_rate = (uintptr_t)device_get_match_data(dev);
+	if (!gck_rate)
+		gck_rate = ATMEL_SDHC_GCK_RATE;
 
 	priv = xzalloc(sizeof(*priv));
 	dev->priv = priv;
@@ -119,7 +126,12 @@ static int at91_sdhci_probe(struct device *dev)
 		return PTR_ERR(iores);
 	}
 
-	priv->mainck = clk_get(dev, "baseclk");
+	/*
+	 * "baseclk" is the PMC base clock on sama5d2/sam9x60. The LAN969X
+	 * SDHCI binding doesn't expose it (the GCK driver handles the upstream
+	 * source internally), so treat it as optional.
+	 */
+	priv->mainck = clk_get_optional(dev, "baseclk");
 	if (IS_ERR(priv->mainck)) {
 		dev_err(dev, "failed to get baseclk\n");
 		return PTR_ERR(priv->mainck);
@@ -147,7 +159,7 @@ static int at91_sdhci_probe(struct device *dev)
 	at91_sdhci_mmio_init(&priv->host, IOMEM(iores->start));
 	priv->host.sdhci.mci = &priv->mci;
 
-	priv->gck_rate = at91_sdhci_conf_clks(priv);
+	priv->gck_rate = at91_sdhci_conf_clks(priv, gck_rate);
 	if (priv->gck_rate < 0)
 		return priv->gck_rate;
 
@@ -164,6 +176,8 @@ static int at91_sdhci_probe(struct device *dev)
 static const struct of_device_id at91_sdhci_dt_match[] = {
 	{ .compatible = "atmel,sama5d2-sdhci"  },
 	{ .compatible = "microchip,sam9x60-sdhci" },
+	{ .compatible = "microchip,lan9691-sdhci",
+	  .data = (void *)LAN969X_GCK_RATE },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, at91_sdhci_dt_match);
-- 
2.47.3




  parent reply	other threads:[~2026-06-12  6:00 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-12  5:59 [PATCH v1 01/10] ARM: introduce ARCH_MICROCHIP for ARM64 Microchip SoCs Oleksij Rempel
2026-06-12  5:59 ` [PATCH v1 02/10] serial: atmel: add lan9696 (Microchip LAN969X) support Oleksij Rempel
2026-06-12 12:49   ` Marco Felsch
2026-06-12  5:59 ` [PATCH v1 03/10] clk: add Microchip LAN966X / LAN969X generic clock controller driver Oleksij Rempel
2026-06-12 12:58   ` Marco Felsch
2026-06-15  7:02     ` Sascha Hauer
2026-06-15  7:46   ` Sascha Hauer
2026-06-12  5:59 ` [PATCH v1 04/10] clk: tolerate clocks registered without a name Oleksij Rempel
2026-06-12  5:59 ` [PATCH v1 05/10] pinctrl: ocelot: port Microsemi/Microchip Ocelot pinctrl from Linux Oleksij Rempel
2026-06-12  5:59 ` Oleksij Rempel [this message]
2026-06-15  6:17   ` [PATCH v1 06/10] mci: atmel-sdhci: add Microchip LAN9691 / LAN969X SDHCI support Marco Felsch
2026-06-15  7:25   ` Sascha Hauer
2026-06-12  5:59 ` [PATCH v1 07/10] gpio: add Microchip SGPIO (serial GPIO) driver Oleksij Rempel
2026-06-15  7:32   ` Sascha Hauer
2026-06-12  5:59 ` [PATCH v1 08/10] reset: add Microchip sparx5 / LAN969X / LAN966X switch reset driver Oleksij Rempel
2026-06-12  5:59 ` [PATCH v1 09/10] spi: atmel-quadspi: add Microchip LAN966X / LAN969X support Oleksij Rempel
2026-06-12  5:59 ` [PATCH v1 10/10] ARM: add Microchip LAN9696 (LAN969X) SoC and EV23X71A board Oleksij Rempel

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