From: Stefan Kerkmann <s.kerkmann@pengutronix.de>
To: Sascha Hauer <s.hauer@pengutronix.de>,
"open list:BAREBOX" <barebox@lists.infradead.org>
Cc: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Subject: [PATCH v3 5/8] ARM: layerscape: re-init pbl clocksource
Date: Mon, 17 Aug 2026 16:01:16 +0200 [thread overview]
Message-ID: <20260817-feature-pbl-get-time-ns-v3-5-9874c1438855@pengutronix.de> (raw)
In-Reply-To: <20260817-feature-pbl-get-time-ns-v3-0-9874c1438855@pengutronix.de>
After setting the cntfrq the global PBL clocksource must be
re-initialized to function correctly.
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
arch/arm/mach-layerscape/lowlevel-ls1028a.c | 6 +++++-
arch/arm/mach-layerscape/lowlevel-ls1046a.c | 5 ++++-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-layerscape/lowlevel-ls1028a.c b/arch/arm/mach-layerscape/lowlevel-ls1028a.c
index fd013b2b52..ed9284d55a 100644
--- a/arch/arm/mach-layerscape/lowlevel-ls1028a.c
+++ b/arch/arm/mach-layerscape/lowlevel-ls1028a.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <io.h>
+#include <asm/hardware/arm_architected_timer.h>
#include <asm/syscounter.h>
#include <asm/system.h>
#include <mach/layerscape/errata.h>
@@ -35,8 +36,11 @@ static void ls1028a_timer_init(void)
void ls1028a_init_lowlevel(void)
{
+ const uint64_t cntfrq = 25000000;
+
scfg_init(SCFG_ENDIANESS_LITTLE);
- set_cntfrq(25000000);
+ set_cntfrq(cntfrq);
+ arm_arch_timer_init(cntfrq);
ls1028a_timer_init();
ls1028a_errata();
}
diff --git a/arch/arm/mach-layerscape/lowlevel-ls1046a.c b/arch/arm/mach-layerscape/lowlevel-ls1046a.c
index 1307c05eaf..cc2793acf2 100644
--- a/arch/arm/mach-layerscape/lowlevel-ls1046a.c
+++ b/arch/arm/mach-layerscape/lowlevel-ls1046a.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <io.h>
+#include <asm/hardware/arm_architected_timer.h>
#include <asm/syscounter.h>
#include <asm/system.h>
#include <mach/layerscape/errata.h>
@@ -222,11 +223,13 @@ void ls1046a_init_lowlevel(void)
{
struct ccsr_cci400 __iomem *cci = IOMEM(LSCH2_CCI400_ADDR);
struct ccsr_scfg *scfg = IOMEM(LSCH2_SCFG_ADDR);
+ const uint64_t cntfrq = 25000000;
scfg_init(SCFG_ENDIANESS_BIG);
init_csu();
ls1046a_init_l2_latency();
- set_cntfrq(25000000);
+ set_cntfrq(cntfrq);
+ arm_arch_timer_init(cntfrq);
syscnt_enable(IOMEM(LSCH2_SYS_COUNTER_ADDR));
/* Make DMA master reads and writes snoopable */
--
2.47.3
next prev parent reply other threads:[~2026-08-17 14:02 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 14:01 [PATCH v3 0/8] PBL: enable timeouts in read_poll_timeout macros Stefan Kerkmann
2026-08-17 14:01 ` [PATCH v3 1/8] RISC-V: setup_c: avoid clearing BSS twice Stefan Kerkmann
2026-08-17 14:01 ` [PATCH v3 2/8] ARM/ARM64/RISC-V: pbl: add constructor support Stefan Kerkmann
2026-08-18 12:08 ` [PATCH] amend! " Stefan Kerkmann
2026-08-19 9:39 ` [PATCH v3 2/8] " Sascha Hauer
2026-08-17 14:01 ` [PATCH v3 3/8] clocksource: allow re-init for same clock Stefan Kerkmann
2026-08-17 14:01 ` [PATCH v3 4/8] drivers: arm_architected_timer: refactor for pbl compatibility Stefan Kerkmann
2026-08-20 7:04 ` Sascha Hauer
2026-08-20 7:32 ` Stefan Kerkmann
2026-08-20 8:00 ` Sascha Hauer
2026-08-20 8:07 ` Stefan Kerkmann
2026-08-17 14:01 ` Stefan Kerkmann [this message]
2026-08-17 15:42 ` [PATCH v3 5/8] ARM: layerscape: re-init pbl clocksource Ahmad Fatoum
2026-08-20 6:59 ` Sascha Hauer
2026-08-20 8:06 ` Stefan Kerkmann
2026-08-17 14:01 ` [PATCH v3 6/8] ARM: socfpga: agilex5: " Stefan Kerkmann
2026-08-17 14:01 ` [PATCH v3 7/8] ARM64: enable PBL_CLOCKSOURCE compatibility Stefan Kerkmann
2026-08-17 14:01 ` [PATCH v3 8/8] linux/iopoll: enable polled timeouts for PBL_CLOCKSOURCE Stefan Kerkmann
2026-08-19 7:03 ` [PATCH v3 0/8] PBL: enable timeouts in read_poll_timeout macros Sascha Hauer
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